McSPI driver previously assumed that D0 was input (MISO) and D1 was output (MOSI).
This forces the hardware designer to wire all SPI peripherals in this way when
it should be a software configuration option.
Signed-off-by: Stan Hu <stanhu@xxxxxxxxx>
---
arch/arm/plat-omap/include/plat/mcspi.h | 2 ++
drivers/spi/spi-omap2-mcspi.c | 11 +++++++++--
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/mcspi.h b/arch/arm/plat-omap/include/plat/mcspi.h
index a357eb2..0a6b790 100644
--- a/arch/arm/plat-omap/include/plat/mcspi.h
+++ b/arch/arm/plat-omap/include/plat/mcspi.h
@@ -18,6 +18,8 @@ struct omap2_mcspi_dev_attr {
struct omap2_mcspi_device_config {
unsigned turbo_mode:1;
+ /* 1 -> [D0 = MOSI, D1 = MISO], otherwise vice versa */
+ unsigned d0_is_output:1;
};
#endif
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index b2fb141..1853527 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -717,6 +717,7 @@ static int omap2_mcspi_setup_transfer(struct spi_device *spi,
struct spi_transfer *t)
{
struct omap2_mcspi_cs *cs = spi->controller_state;
+ struct omap2_mcspi_device_config *cd = spi->controller_data;
struct omap2_mcspi *mcspi;
struct spi_master *spi_cntrl;
u32 l = 0, div = 0;
@@ -742,8 +743,14 @@ static int omap2_mcspi_setup_transfer(struct spi_device *spi,
/* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS
* REVISIT: this controller could support SPI_3WIRE mode.
*/
- l &= ~(OMAP2_MCSPI_CHCONF_IS|OMAP2_MCSPI_CHCONF_DPE1);
- l |= OMAP2_MCSPI_CHCONF_DPE0;
+ l &= ~(OMAP2_MCSPI_CHCONF_IS|
+ OMAP2_MCSPI_CHCONF_DPE0|OMAP2_MCSPI_CHCONF_DPE1);
+
+ /* set input selection for D0 and D1 */
+ if (cd->d0_is_output)
+ l |= OMAP2_MCSPI_CHCONF_IS|OMAP2_MCSPI_CHCONF_DPE1;
+ else
+ l |= OMAP2_MCSPI_CHCONF_DPE0;
/* wordlength */
l &= ~OMAP2_MCSPI_CHCONF_WL_MASK;
--
1.7.9.5
--
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