Nishanth Menon <nm@xxxxxx> writes:
> Ideally in the flow of DVFS programming, VP should be in idle state
> (since we disabled it) before entering forceupdate. Ensure that
> this is the case. Not doing this could cause VP statemachine
> to enter invalid states.
>
> Cc: Tony Lindgren <tony@xxxxxxxxxxx>
> Cc: Kevin Hilman <khilman@xxxxxx>
> Cc: linux-omap@xxxxxxxxxxxxxxx
> Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
>
> Signed-off-by: Vinay Amancha <vinaykumar@xxxxxx>
> Signed-off-by: Nishanth Menon <nm@xxxxxx>
> ---
> arch/arm/mach-omap2/vp.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
> index 925d869..985091b 100644
> --- a/arch/arm/mach-omap2/vp.c
> +++ b/arch/arm/mach-omap2/vp.c
> @@ -123,6 +123,18 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
> u8 target_vsel, current_vsel;
> int ret, timeout = 0;
>
> +/*
missing indent
> + * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
> + * This is an additional allowance to ensure we are in proper state
> + * to enter into forceupdate state transition.
> + */
> + omap_test_timeout((voltdm->read(vp->vstatus)),
> + VP_IDLE_TIMEOUT, timeout);
> +
> + if (timeout >= VP_IDLE_TIMEOUT)
> + pr_warning("%s: vdd_%s idle timedout forceupdate(v=%ld)\n",
> + __func__, voltdm->name, target_volt);
> +
Again, some clean failure and error recovery should be done here instead
of just a print and bail.
Kevin
> ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel);
> if (ret)
> return ret;
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