Re: L2 cache stability workaround for 4460 ES1.0

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On Mon, Apr 2, 2012 at 1:25 PM, Roger Quadros <rogerq@xxxxxx> wrote:
> On 04/02/2012 10:38 AM, Shilimkar, Santosh wrote:
>> On Mon, Apr 2, 2012 at 12:25 PM, Roger Quadros <rogerq@xxxxxx> wrote:
>>> Hi Santosh,
>>>
>>> I came across the attached patch from you. I also came across this post
>>> stating that it was decided not to send this patch upstream.
>>>
>>> http://www.digipedia.pl/usenet/thread/18885/8437/#post8496
>>>
>>> The problem is that we have to keep porting this patch each time we
>>> update the kernel.
>>>
>>> Do you know if the root cause has been found? If not can we have this
>>> patch upstream till the root cause is found?
>>>
>> Yes and fixed in OMAP4460 ES1.2.
>
> Did you mean ES1.1?
>
yep. Sorry for the typo.

> Could you please point me to the errata ID? The only cache related
> errata I can see is Errata ID: i690
>
>>
>>> It seems the patch at least makes the kernel usable on ES1.0.
>>>
>> I know but that still is not enough. It's like 80 % WA of the issue
>> seen on ES1.0. We are not suppose to have many boards with
>> ES1.0
>>
> Even better if there are not many boards. It seems most of the boards
> will be with TI. I think we should have the fix in even if it is not
> 100% fix.
>
> What do you say?
>
My request is to get rid of ES1.0 board because the WA just
not completely correct. Don't feel patching kernel for silicon
which is not suppose to be used nether has complete WA
to support it.

Regards
Santosh
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