On Tue, Mar 20, 2012 at 04:53:53PM +0100, Samuel Ortiz wrote: > Hi Keshava, > > On Mon, Mar 19, 2012 at 12:12:47PM +0530, Keshava Munegowda wrote: > > From: Keshava Munegowda <Keshava_mgowda@xxxxxx> > > > > It is observed that the echi ports of 3430 sdp board > > are not working due to the random timing of programming > > the associated GPIOs of the ULPI PHYs of the EHCI for reset. > > If the PHYs are reset at during usbhs core driver, host ports will > > not work because EHCI driver is loaded after the resetting PHYs. > > The PHYs should be in reset state while initializing the EHCI > > controller. > > The code which does the GPIO pins associated with the PHYs > > are programmed to reset is moved from the USB host core driver > > to EHCI driver. > > > > Signed-off-by: Keshava Munegowda <keshava_mgowda@xxxxxx> > > Reviewed-by: Partha Basak <parthab@xxxxxxxxxxxx> > Felipe, are you ok with that patch ? > I'll most likely queue it after this merge window is closed though. my bad, here's my Ack: Acked-by: Felipe Balbi <balbi@xxxxxx> -- balbi
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