Re: GPIO debounce problems on 3.2

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On Wed, Feb 1, 2012 at 5:30 PM, Kevin Hilman <khilman@xxxxxx> wrote:
> Grazvydas Ignotas <notasas@xxxxxxxxx> writes:
>
>> On Wed, Feb 1, 2012 at 8:06 AM, Paul Walmsley <paul@xxxxxxxxx> wrote:
>>>
>>> Along these lines, you might try patching omap2_gpio_prepare_for_idle() to
>>> turn off the DEBOUNCENABLE bits?
>>
>> Yes that helps. I guess I'll carry this in pandora tree, at least
>> we'll have debounce while more demanding programs/games are running.
>
> Care to share the patch?  It might be worth merging until we have a full
> solution.

Attached.

>> Don't know how it's all working for Kevin though..
>
> Now I'm not so sure either...
>
> At first I thought it was because I was getting IO ring wakeups, but
> using vanilla 3.2, MPU, CORE & PER are staying on due to the (broken)
> UART constraint, so I'm getting module-level wakeups, but haven't dug
> into why.

Maybe the CPU is sometimes busy and debounce clock is enabled long
enough for it to work.


-- 
Gražvydas
From f384b2b48970db36a751f454d1ef10910775b5d2 Mon Sep 17 00:00:00 2001
From: Grazvydas Ignotas <notasas@xxxxxxxxx>
Date: Wed, 1 Feb 2012 15:10:52 +0200
Subject: [PATCH] gpio/omap: disable debounce on idle

After omap2_gpio_prepare_for_idle call it's not guaranteed that given
GPIO module will hit idle, so it might end up in active state but with
debounce clock disabled, which will break input functionality.

Disable debounce feature on idle to avoid this problem.

Signed-off-by: Grazvydas Ignotas <notasas@xxxxxxxxx>
---
 drivers/gpio/gpio-omap.c |   16 ++++++++++++++++
 1 files changed, 16 insertions(+), 0 deletions(-)

diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 0b05629..4f8e8ba 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1347,9 +1347,19 @@ void omap2_gpio_prepare_for_idle(int off_mode)
 
 	for (i = min; i < gpio_bank_count; i++) {
 		struct gpio_bank *bank = &gpio_bank[i];
+		void __iomem *reg;
 		u32 l1 = 0, l2 = 0;
 		int j;
 
+		/*
+		 * Disable debounce since clock disable below will cause
+		 * problems if GPIO module doesn't go idle for some reason.
+		 */
+		if (bank->dbck_enable_mask != 0) {
+			reg = bank->base + bank->regs->debounce_en;
+			__raw_writel(0, reg);
+		}
+
 		for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
 			clk_disable(bank->dbck);
 
@@ -1415,12 +1425,18 @@ void omap2_gpio_resume_after_idle(void)
 		min = 1;
 	for (i = min; i < gpio_bank_count; i++) {
 		struct gpio_bank *bank = &gpio_bank[i];
+		void __iomem *reg;
 		u32 l = 0, gen, gen0, gen1;
 		int j;
 
 		for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
 			clk_enable(bank->dbck);
 
+		if (bank->dbck_enable_mask != 0) {
+			reg = bank->base + bank->regs->debounce_en;
+			__raw_writel(bank->dbck_enable_mask, reg);
+		}
+
 		if (!workaround_enabled)
 			continue;
 
-- 
1.7.0.4


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