On Sun, 2012-01-22 at 07:46 +1100, NeilBrown wrote: > On Sat, 21 Jan 2012 17:57:07 +0200 Tomi Valkeinen <tomi.valkeinen@xxxxxx> > wrote: > > In this case something is affecting the DSS (clocks? powers?), or the > > memory, or the process of reading the pixels. I really don't see the MPU > > or IRQs affecting this problem, except indirectly. > > Which clocks, exactly, are important? > > I collected some clock.c tracing while dss was repeatedly complaining about > losing SYNC, and notice that omap_96m_fck was being enabled and disabled in > hardware. > omap_96m_fck is upstream for dss_96m_fck which provides the tv_dac_clk. > > Could it be this clock turning on and off which causes the problem? I don't think 96m clock is important. At least I'm testing with plain DPI, not tv-out. And I think missing 96m clock would just lead to a missing image on the tv, not sync losts. For OMAP3 DSS when using DPI the following clocks are important: DPLL4_ALWON_FCLKOUTM4X2 (i.e. DSS1_ALWON_FCLK) (dss func clock) DSS_L3_ICLK (to fetch pixels) DSS_L4_ICLK (to configure dss registers) I don't think any other clocks are used. Tomi
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