On Thu, Dec 22, 2011 at 12:53 AM, Arjan van de Ven <arjan@xxxxxxxxxxxxxxx> wrote: > On 12/22/2011 9:35 AM, Shilimkar, Santosh wrote: > >> Indeed. The SOCs, Arch's which does support low power >> state independently and doesn't need any co-ordination between CPU's >> will continue to work same way as before with this series. > > btw I think you misunderstand; I don't object to a need for something > like this, I am just very concerned that this may not be possible to be > done in a race-free way. I agree that there are many potential races in this code, but I believe I've handled all of them. This patch set is a refactoring of the common parts of the SMP idle code that has shipped on Tegra and OMAP4 devices, so the basic idea has been hammered on extensively. I think I've explained the protection against the race condition you asked about earlier. As for the power impact, the power savings of getting into the deeper coupled power states far outweighs the cost of booting all coupled cpus out of idle and letting them loop back to a shallower idle state. On an OMAP4 platform, at the slowest cpu speed, the system-wide power usage with both cpus in the non-coupled state (WFI) is around 50 mA, while the deepest coupled state is 12 mA. At the fastest cpu speed, WFI is over 100 mA. On some platforms it may be possible to have only one cpu boot out of idle when an interrupt arrives, but that introduces the race condition you asked about before, where the last cpu tries to go into idle at the same time that an already-idle cpu comes back out. This way has fairly minimal overhead (booting the 2nd cpu and then going to WFI), and that's a path that already needs to be fast because it's part of the normal single-cpu idle path. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
