As a proof of concept, change OMAP's cpufreq driver to use mpu_clk in
place of directly using the DPLL. This better reflects reality as there
are some functional clks between the ARM IP and the PLL.
To make this work mpu_clk uses the new .round_rate function
omap2_passthrough_round_rate, which simplies passing up a rate change
request to the parent.
Not for merging, just to get discussion going around the common clk
patches and future OMAP adaptations.
Not-signed-off-by: Mike Turquette <mturquette@xxxxxx>
---
drivers/cpufreq/omap-cpufreq.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/cpufreq/omap-cpufreq.c b/drivers/cpufreq/omap-cpufreq.c
index 5d04c57..45cb7f9 100644
--- a/drivers/cpufreq/omap-cpufreq.c
+++ b/drivers/cpufreq/omap-cpufreq.c
@@ -247,7 +247,7 @@ static int __init omap_cpufreq_init(void)
else if (cpu_is_omap34xx())
mpu_clk_name = "dpll1_ck";
else if (cpu_is_omap44xx())
- mpu_clk_name = "dpll_mpu_ck";
+ mpu_clk_name = "mpu_clk";
if (!mpu_clk_name) {
pr_err("%s: unsupported Silicon?\n", __func__);
--
1.7.5.4
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