On 09/28/2011 03:57 PM, Cousson, Benoit wrote: > On 9/28/2011 8:23 PM, Scott Wood wrote: >> What does "the id" mean, in relation to the actual hardware? > > It's true that the description is not super meaningful... > This is the HW instance number. We have 6 gpios, named gpio1 to gpio6, > but the pin numbering is global, meaning from 1 to 192, sine only the > global number is referenced in the pinmuxing control, we have to > maintain the order to ensure the right number. I'd either have one node that handles all the banks (with multiple "reg" resources in the order that they should be mapped to the numberspace), or avoid using that global numberspace and reference things by bank/offset (with the bank identified by alias or phandle). > I still do not know how to use that with the way gpio binding is > working. Because in theory each gpio controller should be referenced > with the local number, not the global one. And converting that global > number from HW spec to a gpio instance + local number seems to me very > error prone. You could say the same thing about a chip whose manual is written assuming a global IRQ numberspace with a certain encoding scheme. Or in the other direction, Freescale's manuals split up MPIC interrupts into external/internal/MSI, while they really just map to different regions of the openpic (hardware standard that Freescale's MPIC is an instance of) interrupt space. The device trees use the raw openpic interrupt numbers. There's certainly potential for confusion, but at least the device tree representation is internally consistent and doesn't make assumptions about the overall system. -Scott -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
