The current DMA context restore clears all the DMA channel registers
even if the channels are in use. This will result in transfer failures
if repeated DMA transfers are initiated with one time DMA channel
configuration.
Also, remove access to sysconfig register during context save/restore
since it will be handled through hwmod layer.
Tested on OMAP3430 Zoom2 with
- off mode enabled
- one time DMA channel configuration
- repeated DMA transfers
Signed-off-by: G, Manjunath Kondaiah <manjugk@xxxxxx>
---
arch/arm/plat-omap/dma.c | 9 ---------
1 files changed, 0 insertions(+), 9 deletions(-)
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 3c39794..5c4ae7d 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2059,29 +2059,20 @@ void omap_dma_global_context_save(void)
pm_runtime_get_sync(dev);
omap_dma_global_context.dma_irqenable_l0 =
p->dma_read(IRQENABLE_L0, 0);
- omap_dma_global_context.dma_ocp_sysconfig =
- p->dma_read(OCP_SYSCONFIG, 0);
omap_dma_global_context.dma_gcr = p->dma_read(GCR, 0);
pm_runtime_put_autosuspend(dev);
}
void omap_dma_global_context_restore(void)
{
- int ch;
-
pm_runtime_get_sync(dev);
p->dma_write(omap_dma_global_context.dma_gcr, GCR, 0);
- p->dma_write(omap_dma_global_context.dma_ocp_sysconfig,
- OCP_SYSCONFIG, 0);
p->dma_write(omap_dma_global_context.dma_irqenable_l0,
IRQENABLE_L0, 0);
if (IS_DMA_ERRATA(DMA_ROMCODE_BUG))
p->dma_write(0x3 , IRQSTATUS_L0, 0);
- for (ch = 0; ch < dma_chan_count; ch++)
- if (dma_chan[ch].dev_id != -1)
- omap_clear_dma(ch);
pm_runtime_put_autosuspend(dev);
}
--
1.7.1
--
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