On 3/10/2011 11:54 AM, Kalle Jokiniemi wrote:
From: Paul Walmsley<paul@xxxxxxxxx>
The HW superwised smart idle for wdtimer in OMAP3 prevents
CORE power domain idle transitions. Disable it by swithing
to SW supervised transitions.
We should probably highlight that this looks like a HW bug.
Smartidle and clockactivity are supposed to be supported by this module
on OMAP3.
Some further investigation with TI HW folks are needed to understand that.
Regards,
Benoit
Signed-off-by: Kalle Jokiniemi<kalle.jokiniemi@xxxxxxxxx>
Signed-off-by: Paul Walmsley<paul@xxxxxxxxx>
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 196a834..a99a4f3 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1293,6 +1293,7 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = {
.slaves = omap3xxx_wd_timer2_slaves,
.slaves_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_slaves),
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+ .flags = HWMOD_SWSUP_SIDLE,
};
/* UART common */
--
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