On Mon, Feb 21, 2011 at 8:43 PM, Ramirez Luna, Omar <omar.ramirez@xxxxxx> wrote:
> Hi,
Hi,
Thanks for the comments.
>
> On Wed, Feb 16, 2011 at 1:35 PM, David Cohen <dacohen@xxxxxxxxx> wrote:
>> diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c
>> index 49a1e5e..adb083e 100644
>> --- a/arch/arm/mach-omap2/iommu2.c
>> +++ b/arch/arm/mach-omap2/iommu2.c
> ...
>>
>> Â Â Â Âda = iommu_read_reg(obj, MMU_FAULT_AD);
>> Â Â Â Â*ra = da;
>>
>> + Â Â Â if (stat & MMU_IRQ_TLBMISS)
>> + Â Â Â Â Â Â Â errs |= OMAP_IOMMU_ERR_TLB_MISS;
>> + Â Â Â if (stat & MMU_IRQ_TRANSLATIONFAULT)
>> + Â Â Â Â Â Â Â errs |= OMAP_IOMMU_ERR_TRANS_FAULT;
>> + Â Â Â if (stat & MMU_IRQ_EMUMISS)
>> + Â Â Â Â Â Â Â errs |= OMAP_IOMMU_ERR_EMU_MISS;
>> + Â Â Â if (stat & MMU_IRQ_TABLEWALKFAULT)
>> + Â Â Â Â Â Â Â errs |= OMAP_IOMMU_ERR_TBLWALK_FAULT;
>> + Â Â Â if (stat & MMU_IRQ_MULTIHITFAULT)
>> + Â Â Â Â Â Â Â errs |= OMAP_IOMMU_ERR_MULTIHIT_FAULT;
>
> I still don't think this adds any value, "generic layer" and omap
> errors are the same thing in this case... OTOH OMAP 1710 (not
> supported by iommu yet) has the following bits:
>
> 3 Prefetch_err
> 2 Perm_fault
> 1 Tlb_miss
> 0 Trans_fault
>
> They don't match any of your "generic layer errors" masks for reading,
Have you noticed:
0 = OMAP_IOMMU_ERR_TRANS_FAULT
1 = OMAP_IOMMU_ERR_TLB_MISS
2 and 3 could be added.
> hence more generic errors will need to be defined, and then more OMAP#
> masks... I think we just need to stick with the mach specific errors,
> and let mach code handle its specifics when reporting.
How many are we talking about? I don't think every new OMAP version it
would completely re-invent IOMMU faults.
Generic errors codes make easier to threat possible IOMMU users which
have (partially or totally) common drivers for different OMAP
versions.
Unless it's really an out-of-control number of generic faults, I don't
see it as a real problem.
>
> But anyway it is just me...
>
>> diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
>> index f55f458..b0e0efc 100644
>> --- a/arch/arm/plat-omap/iommu.c
>> +++ b/arch/arm/plat-omap/iommu.c
>> @@ -780,25 +780,19 @@ static void iopgtable_clear_entry_all(struct iommu *obj)
>> Â*/
>> Âstatic irqreturn_t iommu_fault_handler(int irq, void *data)
>> Â{
>> - Â Â Â u32 stat, da;
>> + Â Â Â u32 da, errs;
>> Â Â Â Âu32 *iopgd, *iopte;
>> - Â Â Â int err = -EIO;
>> Â Â Â Âstruct iommu *obj = data;
>>
>> Â Â Â Âif (!obj->refcount)
>> Â Â Â Â Â Â Â Âreturn IRQ_NONE;
>>
>> - Â Â Â /* Dynamic loading TLB or PTE */
>> - Â Â Â if (obj->isr)
>> - Â Â Â Â Â Â Â err = obj->isr(obj);
>> -
>> - Â Â Â if (!err)
>> - Â Â Â Â Â Â Â return IRQ_HANDLED;
>> -
>> Â Â Â Âclk_enable(obj->clk);
>> - Â Â Â stat = iommu_report_fault(obj, &da);
>> + Â Â Â errs = iommu_report_fault(obj, &da);
>> Â Â Â Âclk_disable(obj->clk);
>> - Â Â Â if (!stat)
>> +
>> + Â Â Â /* Fault callback or TLB/PTE Dynamic loading */
>> + Â Â Â if (obj->isr && !obj->isr(obj, da, errs, obj->isr_priv))
>> Â Â Â Â Â Â Â Âreturn IRQ_HANDLED;
>
> BTW, why not changing the name isr for cb, it is confusing since there
> is another fault_isr called by mmu, AFAIK nobody uses obj->isr
The main purpose of this function is to be an ISR, not only callback.
But as you noticed, nobody is using it yet, but OMAP3 ISP should start
to use it soon.
>
>> Â Â Â Âiommu_disable(obj);
>> @@ -806,15 +800,16 @@ static irqreturn_t iommu_fault_handler(int irq, void *data)
>> Â Â Â Âiopgd = iopgd_offset(obj, da);
>>
>> Â Â Â Âif (!iopgd_is_table(*iopgd)) {
>> - Â Â Â Â Â Â Â dev_err(obj->dev, "%s: da:%08x pgd:%p *pgd:%08x\n", obj->name,
>> - Â Â Â Â Â Â Â Â Â Â Â da, iopgd, *iopgd);
>> + Â Â Â Â Â Â Â dev_err(obj->dev, "%s: errs:0x%08x da:0x%08x pgd:0x%p "
>> + Â Â Â Â Â Â Â Â Â Â Â "*pgd:px%08x\n", obj->name, errs, da, iopgd, *iopgd);
>> Â Â Â Â Â Â Â Âreturn IRQ_NONE;
>> Â Â Â Â}
>>
>> Â Â Â Âiopte = iopte_offset(iopgd, da);
>>
>> - Â Â Â dev_err(obj->dev, "%s: da:%08x pgd:%p *pgd:%08x pte:%p *pte:%08x\n",
>> - Â Â Â Â Â Â Â obj->name, da, iopgd, *iopgd, iopte, *iopte);
>> + Â Â Â dev_err(obj->dev, "%s: errs:0x%08x da:0x%08x pgd:0x%p *pgd:0x%08x "
>> + Â Â Â Â Â Â Â "pte:0x%p *pte:0x%08x\n", obj->name, errs, da, iopgd, *iopgd,
>> + Â Â Â Â Â Â Â iopte, *iopte);
>>
>> Â Â Â Âreturn IRQ_NONE;
>> Â}
>> @@ -917,6 +912,33 @@ void iommu_put(struct iommu *obj)
>> Â}
>> ÂEXPORT_SYMBOL_GPL(iommu_put);
>>
>> +int iommu_set_isr(const char *name,
>> + Â Â Â Â Â Â Â Â int (*isr)(struct iommu *obj, u32 da, u32 iommu_errs,
>> + Â Â Â Â Â Â Â Â Â Â Â Â Â Âvoid *priv),
>> + Â Â Â Â Â Â Â Â void *isr_priv)
>
> So I think the following will be bad practice:
>
> Â Â Â Âmmu = iommu_get("iva2");
> Â Â Â Âif (!IS_ERR(mmu))
> Â Â Â Â Â Â Â Âmmu->isr = mmu_fault_callback;
>
> Shall we think anything to prevent such mis-usage?
Well, the IOMMU user has access to IOMMU obj, so it can not only
change the (*isr)() but to mess with a lot of other stuff. The only
way to prevent it is to avoid user to have obj. But then, this fix (or
issue) does not belong to this patch.
Br,
David
>
> Regards,
>
> Omar
>
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