DSS DPLL fclk pointer is set, to configure pixel clock for DPI interface.
Signed-off-by: Raghuveer Murthy <raghuveer.murthy@xxxxxx>
---
drivers/video/omap2/dss/dss.c | 7 +++++++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c
index 654f5e6..d76bc26 100644
--- a/drivers/video/omap2/dss/dss.c
+++ b/drivers/video/omap2/dss/dss.c
@@ -628,6 +628,13 @@ static int dss_init(bool skip_init)
r = PTR_ERR(dss.dpll_per_mx_ck);
goto fail2;
}
+ } else if (cpu_is_omap44xx()) {
+ dss.dpll_per_mx_ck = clk_get(NULL, "dpll_per_m5x2_ck");
+ if (IS_ERR(dss.dpll_per_mx_ck)) {
+ DSSERR("Failed to get dpll_per_mx_ck\n");
+ r = PTR_ERR(dss.dpll_per_mx_ck);
+ goto fail2;
+ }
}
dss.dsi_clk_source = DSS_SRC_DSS1_ALWON_FCLK;
--
1.7.0.4
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