On Tue, Jan 25, 2011 at 01:04:22PM +0000, Russell King - ARM Linux wrote:
> Actually, we can do this safely - byte stores are permitted to SCU
> registers probably for this very reason.
3rd revision of the patch:
arch/arm/include/asm/smp_scu.h | 5 +++++
arch/arm/kernel/smp_scu.c | 16 ++++++++++++++++
2 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/smp_scu.h b/arch/arm/include/asm/smp_scu.h
index 2376835..108f31d 100644
--- a/arch/arm/include/asm/smp_scu.h
+++ b/arch/arm/include/asm/smp_scu.h
@@ -1,7 +1,12 @@
#ifndef __ASMARM_ARCH_SCU_H
#define __ASMARM_ARCH_SCU_H
+#define SCU_PM_NORMAL 0
+#define SCU_PM_DORMANT 2
+#define SCU_PM_POWEROFF 3
+
unsigned int scu_get_core_count(void __iomem *);
void scu_enable(void __iomem *);
+int scu_power_mode(unsigned int);
#endif
diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c
index 9ab4149..c956984 100644
--- a/arch/arm/kernel/smp_scu.c
+++ b/arch/arm/kernel/smp_scu.c
@@ -50,3 +50,19 @@ void __init scu_enable(void __iomem *scu_base)
*/
flush_cache_all();
}
+
+int scu_power_mode(unsigned int mode)
+{
+ unsigned int val;
+ int cpu = smp_processor_id();
+ int shift;
+
+ if (mode > 3 || mode == 1 || cpu > 3)
+ return -EINVAL;
+
+ val = __raw_readb(scu_base + SCU_CPU_STATUS + cpu) & ~0x03;
+ val |= mode;
+ __raw_writeb(val, scu_base + SCU_CPU_STATUS + cpu);
+
+ return 0;
+}
--
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