Santosh Shilimkar wrote, on 12/20/2010 01:13 AM:
[..]
This is be done according to ARM documentation. Currently this is
identified
as being needed on OMAP3630 as the disable/enable is done from "public
side"
while, on OMAP3430, this is done in the "secure side".
Can you point me to ARM doc which says " for L2 invalidation, the
controller
needs to be disabled" ?
please see section 8.3 of the Cortex-A8 TRM
--
Regards,
Nishanth Menon
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