* Nishanth Menon <nm@xxxxxx> [101118 08:46]: > > But after wfi in wait_sdrc_ok as part of the code executing in SRAM > today omap34xx_cpu_suspend -> we are waiting for DPLL3 lock prior to > accessing DDR -> how do we execute that logic in SDRAM? I too am a bit concerned how this will all keep working. For light testing it may be running OK if it happens to run from cache.. Also, moving the code out of SRAM will limit the options for what we may need to do with DDR or L3. Retention is something to consider, are there issues with that? Regards, Tony -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
