Mux settings will have to go in per device init file for the
long term. Until someone does it, apply the same mux settings
than X-loader, minus the OFF mode.
Signed-off-by: Benoit Cousson <b-cousson@xxxxxx>
Cc: Tony Lindgren <tony@xxxxxxxxxxx>
Cc: Paul Walmsley <paul@xxxxxxxxx>
Cc: Kevin Hilman <khilman@xxxxxxxxxxxxxxxxxxx>
Cc: Santosh Shilimkar <santosh.shilimkar@xxxxxx>
---
arch/arm/mach-omap2/board-4430sdp.c | 377 +++++++++++++++++++++++++++++++++++
1 files changed, 377 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index d087712..8bf026a 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -431,6 +431,383 @@ static int __init omap4_i2c_init(void)
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
+ /* Audio backend settings */
+ OMAP4_MUX(ABE_CLKS, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_DMIC_CLK1, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_DMIC_DIN1, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_DMIC_DIN2, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_DMIC_DIN3, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ /* abe_slimbus1_clock */
+ OMAP4_MUX(ABE_MCBSP1_CLKX, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE1),
+ /* abe_slimbus1_data */
+ OMAP4_MUX(ABE_MCBSP1_DR, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE1),
+ OMAP4_MUX(ABE_MCBSP1_DX, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_MCBSP1_FSX, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_MCBSP2_CLKX, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_MCBSP2_DR, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_MCBSP2_DX, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_MCBSP2_FSX, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_PDM_DL_DATA, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_PDM_FRAME, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_PDM_LB_CLK, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_PDM_UL_DATA, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+
+ OMAP4_MUX(CAM_SHUTTER, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CAM_STROBE, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CSI21_DX0, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CSI21_DX1, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CSI21_DX2, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ /* safe_mode */
+ OMAP4_MUX(CSI21_DX3, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE7),
+ /* safe_mode */
+ OMAP4_MUX(CSI21_DX4, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE7),
+ OMAP4_MUX(CSI21_DY0, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CSI21_DY1, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CSI21_DY2, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ /* safe_mode */
+ OMAP4_MUX(CSI21_DY3, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE7),
+ /* safe_mode */
+ OMAP4_MUX(CSI21_DY4, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE7),
+ OMAP4_MUX(CSI22_DX0, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CSI22_DX1, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CSI22_DY0, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CSI22_DY1, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+/*
+ * OMAP4_MUX(DPM_EMU0, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(DPM_EMU1, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(DPM_EMU2, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ */
+ /* dsi1_te0 */
+ OMAP4_MUX(C2C_DATA12, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE1),
+ /* dsi2_te0 */
+ OMAP4_MUX(C2C_DATA14, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE1),
+ /* dispc2_data10 */
+ OMAP4_MUX(DPM_EMU3, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data9 */
+ OMAP4_MUX(DPM_EMU4, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data16 */
+ OMAP4_MUX(DPM_EMU5, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data17 */
+ OMAP4_MUX(DPM_EMU6, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_hsync */
+ OMAP4_MUX(DPM_EMU7, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_pclk */
+ OMAP4_MUX(DPM_EMU8, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_vsync */
+ OMAP4_MUX(DPM_EMU9, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_de */
+ OMAP4_MUX(DPM_EMU10, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data8 */
+ OMAP4_MUX(DPM_EMU11, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data7 */
+ OMAP4_MUX(DPM_EMU12, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data6 */
+ OMAP4_MUX(DPM_EMU13, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data5 */
+ OMAP4_MUX(DPM_EMU14, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data4 */
+ OMAP4_MUX(DPM_EMU15, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data3 */
+ OMAP4_MUX(DPM_EMU16, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data2 */
+ OMAP4_MUX(DPM_EMU17, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data1 */
+ OMAP4_MUX(DPM_EMU18, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data0 */
+ OMAP4_MUX(DPM_EMU19, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data20 */
+ OMAP4_MUX(USBB2_ULPITLL_DAT0, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data19 */
+ OMAP4_MUX(USBB2_ULPITLL_DAT1, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data18 */
+ OMAP4_MUX(USBB2_ULPITLL_DAT2, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data15 */
+ OMAP4_MUX(USBB2_ULPITLL_DAT3, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data14 */
+ OMAP4_MUX(USBB2_ULPITLL_DAT4, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data13 */
+ OMAP4_MUX(USBB2_ULPITLL_DAT5, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data12 */
+ OMAP4_MUX(USBB2_ULPITLL_DAT6, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data11 */
+ OMAP4_MUX(USBB2_ULPITLL_DAT7, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data22 */
+ OMAP4_MUX(USBB2_ULPITLL_DIR, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data21 */
+ OMAP4_MUX(USBB2_ULPITLL_NXT, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data23 */
+ OMAP4_MUX(USBB2_ULPITLL_STP, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+
+ /* sys_drm_msecure */
+ OMAP4_MUX(FREF_CLK0_OUT, PAD_WKUP_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE2),
+/*
+ * OMAP4_MUX(FREF_CLK1_OUT, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(FREF_CLK2_OUT, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(FREF_CLK3_OUT, PAD_WKUP_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(FREF_CLK3_REQ, PAD_WKUP_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ * OMAP4_MUX(FREF_CLK4_OUT, PAD_WKUP_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(FREF_CLK4_REQ, PAD_WKUP_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ * OMAP4_MUX(FREF_CLK_IOREQ, PAD_WKUP_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(FREF_SLICER_IN, PAD_WKUP_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(FREF_XTAL_IN, PAD_WKUP_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ */
+ /* sdmmc2_dat0 */
+ OMAP4_MUX(GPMC_AD0, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+ /* sdmmc2_dat1 */
+ OMAP4_MUX(GPMC_AD1, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+ /* sdmmc2_dat2 */
+ OMAP4_MUX(GPMC_AD2, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+ /* sdmmc2_dat3 */
+ OMAP4_MUX(GPMC_AD3, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+ /* sdmmc2_dat4 */
+ OMAP4_MUX(GPMC_AD4, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+ /* sdmmc2_dat5 */
+ OMAP4_MUX(GPMC_AD5, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+ /* sdmmc2_dat6 */
+ OMAP4_MUX(GPMC_AD6, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+ /* sdmmc2_dat7 */
+ OMAP4_MUX(GPMC_AD7, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+ /* sdmmc2_clk */
+ OMAP4_MUX(GPMC_NOE, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+ /* sdmmc2_cmd */
+ OMAP4_MUX(GPMC_NWE, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+
+ /* gpio_32 */
+ OMAP4_MUX(GPMC_AD8, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE3),
+ /* gpio_33 */
+ OMAP4_MUX(GPMC_AD9, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE3),
+ /* gpio_55 */
+ OMAP4_MUX(GPMC_CLK, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_56 */
+ OMAP4_MUX(GPMC_NADV_ALE, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_59 */
+ OMAP4_MUX(GPMC_NBE0_CLE, PAD_CORE_ID, OMAP_PIN_INPUT_PULLDOWN | OMAP_MUX_MODE3),
+ /* gpio_60 */
+ OMAP4_MUX(GPMC_NBE1, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_50 */
+ OMAP4_MUX(GPMC_NCS0, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_51 */
+ OMAP4_MUX(GPMC_NCS1, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE3),
+ /* gpio_52 */
+ OMAP4_MUX(GPMC_NCS2, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE3),
+ /* gpio_53 */
+ OMAP4_MUX(GPMC_NCS3, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE3),
+ /* gpio_54 */
+ OMAP4_MUX(GPMC_NWP, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_61 */
+ OMAP4_MUX(GPMC_WAIT0, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE3),
+ /* gpio_62 */
+ OMAP4_MUX(GPMC_WAIT1, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE3),
+ /* gpio_83 */
+ OMAP4_MUX(CAM_GLOBALRESET, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_100 */
+ OMAP4_MUX(C2C_DATA11, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_102 */
+ OMAP4_MUX(C2C_DATA13, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_104 */
+ OMAP4_MUX(C2C_DATA15, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+
+ OMAP4_MUX(HDMI_CEC, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(HDMI_DDC_SCL, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(HDMI_DDC_SDA, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(HDMI_HPD, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+/*
+ * Done during device init
+ *
+ * OMAP4_MUX(I2C1_SCL, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(I2C1_SDA, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ * OMAP4_MUX(I2C2_SCL, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(I2C2_SDA, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(I2C3_SCL, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(I2C3_SDA, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(I2C4_SCL, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(I2C4_SDA, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ */
+
+/*
+ * Don't touch the JTAG pins
+ *
+ * OMAP4_MUX(JTAG_NTRST, PAD_WKUP_ID, OMAP_PIN_INPUT_PULLDOWN | OMAP_MUX_MODE0),
+ * OMAP4_MUX(JTAG_RTCK, PAD_WKUP_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(JTAG_TCK, PAD_WKUP_ID, OMAP_PIN_INPUT_PULLDOWN | OMAP_MUX_MODE0),
+ * OMAP4_MUX(JTAG_TDI, PAD_WKUP_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ * OMAP4_MUX(JTAG_TDO, PAD_WKUP_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(JTAG_TMS_TMSC, PAD_WKUP_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ */
+ OMAP4_MUX(MCSPI1_CLK, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(MCSPI1_CS0, PAD_CORE_ID, OMAP_PIN_INPUT_PULLDOWN | OMAP_MUX_MODE0),
+ OMAP4_MUX(MCSPI1_CS1, PAD_CORE_ID, OMAP_PIN_INPUT_PULLDOWN | OMAP_MUX_MODE0),
+ OMAP4_MUX(MCSPI1_SIMO, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(MCSPI1_SOMI, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(MCSPI4_CLK, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(MCSPI4_CS0, PAD_CORE_ID, OMAP_PIN_INPUT_PULLDOWN | OMAP_MUX_MODE0),
+ OMAP4_MUX(MCSPI4_SIMO, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(MCSPI4_SOMI, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+
+ OMAP4_MUX(SDMMC1_CLK, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(SDMMC1_CMD, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SDMMC1_DAT0, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SDMMC1_DAT1, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SDMMC1_DAT2, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SDMMC1_DAT3, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SDMMC1_DAT4, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SDMMC1_DAT5, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SDMMC1_DAT6, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SDMMC1_DAT7, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SDMMC5_CLK, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SDMMC5_CMD, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SDMMC5_DAT0, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SDMMC5_DAT1, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SDMMC5_DAT2, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SDMMC5_DAT3, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+
+ OMAP4_MUX(SIM_CD, PAD_WKUP_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SIM_CLK, PAD_WKUP_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(SIM_IO, PAD_WKUP_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(SIM_PWRCTRL, PAD_WKUP_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(SIM_RESET, PAD_WKUP_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+
+ OMAP4_MUX(SR_SCL, PAD_WKUP_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SR_SDA, PAD_WKUP_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SYS_32K, PAD_WKUP_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+
+ /* gpio_34 */
+ OMAP4_MUX(GPMC_AD10, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE3),
+ /* gpio_35 */
+ OMAP4_MUX(GPMC_AD11, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE3),
+ /* gpio_36 */
+ OMAP4_MUX(GPMC_AD12, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE3),
+ /* gpio_37 */
+ OMAP4_MUX(GPMC_AD13, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_38 */
+ OMAP4_MUX(GPMC_AD14, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_39 */
+ OMAP4_MUX(GPMC_AD15, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_40 */
+ OMAP4_MUX(GPMC_A16, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_41 */
+ OMAP4_MUX(GPMC_A17, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_44 */
+ OMAP4_MUX(GPMC_A20, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_45 */
+ OMAP4_MUX(GPMC_A21, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_48 */
+ OMAP4_MUX(GPMC_A24, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_49 */
+ OMAP4_MUX(GPMC_A25, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_127 */
+ OMAP4_MUX(HDQ_SIO, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE3),
+ /* gpio_139 */
+ OMAP4_MUX(MCSPI1_CS2, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_140 */
+ OMAP4_MUX(MCSPI1_CS3, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE3),
+ /* gpio_157 */
+ OMAP4_MUX(USBB2_ULPITLL_CLK, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE3),
+ /* gpio_169 */
+ OMAP4_MUX(USBB2_HSIC_DATA, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_170 */
+ OMAP4_MUX(USBB2_HSIC_STROBE, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_184 */
+ OMAP4_MUX(SYS_BOOT0, PAD_CORE_ID, OMAP_PIN_INPUT_PULLDOWN | OMAP_MUX_MODE3),
+ /* gpio_185 */
+ OMAP4_MUX(SYS_BOOT1, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_186 */
+ OMAP4_MUX(SYS_BOOT2, PAD_CORE_ID, OMAP_PIN_INPUT_PULLDOWN | OMAP_MUX_MODE3),
+ /* gpio_187 */
+ OMAP4_MUX(SYS_BOOT3, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_188 */
+ OMAP4_MUX(SYS_BOOT4, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+ /* gpio_189 */
+ OMAP4_MUX(SYS_BOOT5, PAD_CORE_ID, OMAP_PIN_INPUT_PULLDOWN | OMAP_MUX_MODE3),
+ /* gpio_wk9 */
+ OMAP4_MUX(SYS_BOOT6, PAD_WKUP_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE3),
+ /* gpio_wk10 */
+ OMAP4_MUX(SYS_BOOT7, PAD_WKUP_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE3),
+ /* gpio_wk29 */
+ OMAP4_MUX(SYS_PWRON_RESET_OUT, PAD_WKUP_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
+
+ OMAP4_MUX(SYS_NIRQ1, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SYS_NIRQ2, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(SYS_NRESPWRON, PAD_WKUP_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(SYS_NRESWARM, PAD_WKUP_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(SYS_PWR_REQ, PAD_WKUP_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+
+ OMAP4_MUX(UART2_CTS, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(UART2_RTS, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(UART2_RX, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(UART2_TX, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(UART3_CTS_RCTX, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
+ OMAP4_MUX(UART3_RTS_SD, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(UART3_RX_IRRX, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(UART3_TX_IRTX, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(UART4_RX, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(UART4_TX, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+
+ /* kpd_row0 */
+ OMAP4_MUX(UNIPRO_RX0, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+ /* kpd_row2 */
+ OMAP4_MUX(UNIPRO_RX1, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+ /* kpd_row4 */
+ OMAP4_MUX(UNIPRO_RX2, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+ /* kpd_row1 */
+ OMAP4_MUX(UNIPRO_RY0, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+ /* kpd_row3 */
+ OMAP4_MUX(UNIPRO_RY1, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+ /* kpd_row5 */
+ OMAP4_MUX(UNIPRO_RY2, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+ /* kpd_col0 */
+ OMAP4_MUX(UNIPRO_TX0, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE1),
+ /* kpd_col2 */
+ OMAP4_MUX(UNIPRO_TX1, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE1),
+ /* kpd_col4 */
+ OMAP4_MUX(UNIPRO_TX2, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE1),
+ /* kpd_col1 */
+ OMAP4_MUX(UNIPRO_TY0, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE1),
+ /* kpd_col3 */
+ OMAP4_MUX(UNIPRO_TY1, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE1),
+ /* kpd_col5 */
+ OMAP4_MUX(UNIPRO_TY2, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE1),
+ /* kpd_row6 */
+ OMAP4_MUX(GPMC_A18, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+ /* kpd_row7 */
+ OMAP4_MUX(GPMC_A19, PAD_CORE_ID, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE1),
+ /* kpd_col6 */
+ OMAP4_MUX(GPMC_A22, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE1),
+ /* kpd_col7 */
+ OMAP4_MUX(GPMC_A23, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE1),
+
+ OMAP4_MUX(USBA0_OTG_CE, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(USBA0_OTG_DM, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(USBA0_OTG_DP, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(USBB1_HSIC_DATA, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(USBB1_HSIC_STROBE, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ /* usbb1_ulpiphy_clk */
+ OMAP4_MUX(USBB1_ULPITLL_CLK, PAD_CORE_ID, OMAP_PIN_INPUT_PULLDOWN | OMAP_MUX_MODE4),
+ /* usbb1_ulpiphy_dat0 */
+ OMAP4_MUX(USBB1_ULPITLL_DAT0, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE4),
+ /* usbb1_ulpiphy_dat1 */
+ OMAP4_MUX(USBB1_ULPITLL_DAT1, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE4),
+ /* usbb1_ulpiphy_dat2 */
+ OMAP4_MUX(USBB1_ULPITLL_DAT2, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE4),
+ /* usbb1_ulpiphy_dat3 */
+ OMAP4_MUX(USBB1_ULPITLL_DAT3, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE4),
+ /* usbb1_ulpiphy_dat4 */
+ OMAP4_MUX(USBB1_ULPITLL_DAT4, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE4),
+ /* usbb1_ulpiphy_dat5 */
+ OMAP4_MUX(USBB1_ULPITLL_DAT5, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE4),
+ /* usbb1_ulpiphy_dat6 */
+ OMAP4_MUX(USBB1_ULPITLL_DAT6, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE4),
+ /* usbb1_ulpiphy_dat7 */
+ OMAP4_MUX(USBB1_ULPITLL_DAT7, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE4),
+ /* usbb1_ulpiphy_dir */
+ OMAP4_MUX(USBB1_ULPITLL_DIR, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE4),
+ /* usbb1_ulpiphy_nxt */
+ OMAP4_MUX(USBB1_ULPITLL_NXT, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE4),
+ /* usbb1_ulpiphy_stp */
+ OMAP4_MUX(USBB1_ULPITLL_STP, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE4),
+ OMAP4_MUX(USBC1_ICUSB_DM, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(USBC1_ICUSB_DP, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+
{ .reg_offset = OMAP_MUX_TERMINATOR },
};
#else
--
1.6.0.4
--
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