Re: OMAP 3530 McBSP Frame Sync errors

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On 09/13/2010 03:07 AM, Grazvydas Ignotas wrote:
On Thu, Sep 9, 2010 at 6:56 PM, Gary Thomas<gary@xxxxxxxxxxxx>  wrote:
I'm trying to use McBSP4 with an external CODEC which is a
slave device (i.e. the OMAP generates the Frame Sync pulses)
In this mode, the BSP is purely the master of these signals.

What can it possibly mean to get Frame Sync errors in this case
(I'm reading from the external CODEC)?

FYI, my registers look like this:
  PCR0: 0x00000f0f
  RCR1: 0x00000040, RCR2: 0x00008041
  XCR1: 0x00000040, XCR2: 0x00008041
  SRGR1: 0x00000f07, SRGR2: 0x0000101f

Any ideas or help?

Have you set the right McBSP source clock? It's in DEVCONF1/2 registers.

Yes, the channel works fine, but I only occasionally get errant Frame Sync errors.

--
------------------------------------------------------------
Gary Thomas                 |  Consulting for the
MLB Associates              |    Embedded world
------------------------------------------------------------
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html


[Index of Archives]     [Linux Arm (vger)]     [ARM Kernel]     [ARM MSM]     [Linux Tegra]     [Linux WPAN Networking]     [Linux Wireless Networking]     [Maemo Users]     [Linux USB Devel]     [Video for Linux]     [Linux Audio Users]     [Yosemite Trails]     [Linux Kernel]     [Linux SCSI]

  Powered by Linux