The current iommu module doesn't provide the mechanism to get MMU fault on TLB miss when working with locked TLB entries and TWL disabled. To get the TLB miss interrupt, the TWL should be disabled. This patch set provides the mechanism to disable TWL and enable TLB miss interrupt. Hari Kanigeri (2): omap: iommu-update irq mask to be specific about twl omap: iommu-add functionality to get TLB miss interrupt arch/arm/mach-omap2/iommu2.c | 23 +++++++++++++++++++++-- arch/arm/plat-omap/include/plat/iommu.h | 2 ++ arch/arm/plat-omap/iommu.c | 12 ++++++++++++ 3 files changed, 35 insertions(+), 2 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
