RE: [PATCH 2/2] MUSB DMA_INTR register may sometimes read zero when infact there

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Pandita, Vikram wrote:

<snip>

> >
> >+      if (!int_hsdma) {
> >+              DBG(2, "spurious DMA irq\n");
> >+
> >+              for (bchannel = 0; bchannel < MUSB_HSDMA_CHANNELS; bchannel++) {
> >+                      musb_channel = (struct musb_dma_channel *)
> >+                                      &(controller->channel[bchannel]);
> >+                      channel = &musb_channel->channel;
> >+                      if (channel->status == MUSB_DMA_STATUS_BUSY) {
> >+                              csr = musb_readw(mbase,
> >+                                      MUSB_HSDMA_CHANNEL_OFFSET(bchannel,
> >+                                                      MUSB_HSDMA_COUNT));
> 
>         csr is a misnomer. It should be called count.
>         Also I recommend to add a function:
>         musb_read_hsdma_count() in "musbhsdma.h" just like the write
> counterpart and use here.
> 

Good catch. Yes, will fix. That was copy-pasted from the lines
that follow, and I'll fix that as well.


> >+                              if (csr == 0)
>         Should this not be if (csr != 0) only then you mark that dma
> channel as generated the interrupt?
> 

Nope. DMA_COUNT is a register that is programmed with the number of
bytes to transfer and counts down from there. So when we get a
DMA interrupt but cannot identify from DMA_INTR which channel raised
the interrupt, we rely on the DMA_COUNT being zero for the channels
that raised the interrupt.


> >+                                      int_hsdma |= (1 << bchannel);
> >+                      }
> >+              }
> >+
> >+              DBG(2, "int_hsdma = 0x%x\n", int_hsdma);
> >+
> >+              if (!int_hsdma)
> >+                      goto done;
> >+      }
> >+
> >       for (bchannel = 0; bchannel < MUSB_HSDMA_CHANNELS; bchannel++) {
> >               if (int_hsdma & (1 << bchannel)) {
> >                       musb_channel = (struct musb_dma_channel *)
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