On Thu, 26 Nov 2009, Thara Gopinath wrote: > MPU power domain bank 0 bits are displayed in position of bank 1 > in PWRSTS and PREPWRSTS registers. So read them from correct > position > > Signed-off-by: Thara Gopinath <thara@xxxxxx> > Cc: Kevin Hilman <khilman@xxxxxxxxxxxxxxxxxxx> Thanks Thara, will queue this up. - Paul -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
