On Fri, Nov 13, 2009 at 2:10 AM, Tony Lindgren <tony@xxxxxxxxxxx> wrote:
> * Vimal Singh <vimal.newwork@xxxxxxxxx> [091110 02:08]:
>> From 42f080e0915bbce1509fc8ab3773569fec0a44f1 Mon Sep 17 00:00:00 2001
>> From: Vimal Singh <vimalsingh@xxxxxx>
>> Date: Tue, 10 Nov 2009 11:39:39 +0530
>> Subject: [PATCH] OMAP2/3: Add support for flash on SDP boards
>>
[...]
>> + if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))
>> + /* we dont have an DEBUG FPGA??? */
>> + /* Depend on #defines!! default to strata boot return param */
>> + return 0x0;
>
> Should iounmap before returning, or goto unmap.
will correct it in next version.
>
>
>> + /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
>> + cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;
>> +
>> + /* ES2.0 SDP's onwards 4 dip switches are provided for CS */
>> + if (omap_rev() >= OMAP3430_REV_ES1_0)
>> + /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */
>> + cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |
>> + ((cs & 2) << 1) | ((cs & 1) << 3);
>> + else
>> + /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */
>> + cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);
>> +
>> + iounmap(fpga_map_addr);
>> + return cs;
>> +}
>> +
>> +/**
>> + * sdp3430_flash_init - Identify devices connected to GPMC and register.
>> + *
>> + * @return - void.
>> + */
>> +void __init sdp_flash_init(void)
>> +{
>> + u8 cs = 0;
>> + u8 nandcs = GPMC_CS_NUM + 1;
>> + u8 onenandcs = GPMC_CS_NUM + 1;
>> + u8 idx;
>> + unsigned char *config_sel = NULL;
>> +
>> + /* REVISIT: Is this return correct idx for 2430 SDP?
>> + * for which cs configuration matches for 2430 SDP?
>> + */
>> + idx = get_gpmc0_type();
>> + if (idx >= MAX_SUPPORTED_GPMC_CONFIG) {
>> + printk(KERN_ERR "%s: Invalid chip select: %d\n", __func__, cs);
>> + return;
>> + }
>> + config_sel = (unsigned char *)(chip_sel_sdp[idx]);
>> +
>> + /* Configure start address and size of NOR device */
>> + if (omap_rev() >= OMAP3430_REV_ES1_0) {
>> + sdp_nor_resource.start = FLASH_BASE_SDPV2;
>> + sdp_nor_resource.end = FLASH_BASE_SDPV2
>> + + FLASH_SIZE_SDPV2 - 1;
>> + } else {
>> + sdp_nor_resource.start = FLASH_BASE_SDPV1;
>> + sdp_nor_resource.end = FLASH_BASE_SDPV1
>> + + FLASH_SIZE_SDPV1 - 1;
>> + }
>
> This should be done with gpmc_cs_request using the chip select and size.
> Please see gpmc_smc91x_init() for an example.
I do not think this should be done with 'gpmc_cs_request'. NOR flashes
have been treated somehow differently.
>
>
>> + if (platform_device_register(&sdp_nor_device) < 0)
>> + printk(KERN_ERR "Unable to register NOR device\n");
>> +
>> + while (cs < GPMC_CS_NUM) {
>> + switch (config_sel[cs]) {
>> + case PDC_NAND:
>> + if (nandcs > GPMC_CS_NUM)
>> + nandcs = cs;
>> + break;
>> + case PDC_ONENAND:
>> + if (onenandcs > GPMC_CS_NUM)
>> + onenandcs = cs;
>> + break;
>> + };
>> + cs++;
>> + }
>> +
>> + if (onenandcs > GPMC_CS_NUM)
>> + printk(KERN_INFO "OneNAND: Unable to find configuration "
>> + " in GPMC\n ");
>> + else
>> + board_onenand_init(onenandcs);
>> +
>> + if (nandcs > GPMC_CS_NUM)
>> + printk(KERN_INFO "NAND: Unable to find configuration "
>> + " in GPMC\n ");
>> + else
>> + board_nand_init(nandcs);
>> +}
>> diff --git a/arch/arm/plat-omap/include/plat/board-sdp.h
>> b/arch/arm/plat-omap/include/plat/board-sdp.h
>> new file mode 100644
>> index 0000000..632f21a
>> --- /dev/null
>> +++ b/arch/arm/plat-omap/include/plat/board-sdp.h
>> @@ -0,0 +1,15 @@
>> +/*
>> + * arch/arm/plat-omap/include/plat/board-sdp.h
>> + *
>> + * Information structures for SDP-specific board config data
>> + *
>> + * Copyright (C) 2009 Nokia Corporation
>> + * Copyright (C) 2009 Texas Instruments
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +extern void sdp_flash_init(void);
>> +
>> diff --git a/arch/arm/plat-omap/include/plat/gpmc.h
>> b/arch/arm/plat-omap/include/plat/gpmc.h
>> index 9c99cda..c752ab7 100644
>> --- a/arch/arm/plat-omap/include/plat/gpmc.h
>> +++ b/arch/arm/plat-omap/include/plat/gpmc.h
>> @@ -27,6 +27,8 @@
>>
>> #define GPMC_CONFIG 0x50
>> #define GPMC_STATUS 0x54
>> +#define GPMC_CS0_BASE 0x60
>> +#define GPMC_CS_SIZE 0x30
>>
>> #define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31)
>> #define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30)
>> --
>> 1.5.5
>
--
Regards,
Vimal Singh
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