RE: [PATCH 12/17] OMAP2/3: Do not enable AUTOIDLE in interrupt controller

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> From: linux-omap-owner@xxxxxxxxxxxxxxx [mailto:linux-omap-
> owner@xxxxxxxxxxxxxxx] On Behalf Of Tero.Kristo@xxxxxxxxx
> Sent: Monday, October 19, 2009 5:19 AM

> Is there errata number available for this issue by the way? I could attach
> this to the patch.

No.  I expect in the next few weeks it will be published.  The issue is pretty well understood now down to gate level so time to publish should be process.

> Anyway, I guess the optimization would look something like this:

The below looks good.

> diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
> index 210a806..7a98321 100644
> --- a/arch/arm/mach-omap2/pm34xx.c
> +++ b/arch/arm/mach-omap2/pm34xx.c
> @@ -93,6 +93,8 @@ u32 voltage_off_while_idle;
>                 OMAP3430_ST_GPT5_MASK|OMAP3430_ST_GPT4_MASK|\
>                 OMAP3430_ST_GPT3_MASK|OMAP3430_ST_GPT2_MASK)
>
> +#define INTC_SYSCONFIG                 0x10
> +
>  struct power_state {
>         struct powerdomain *pwrdm;
>         u32 next_state;
> @@ -505,6 +507,12 @@ void omap_sram_idle(void)
>                 prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
>                 omap3_enable_io_chain();
>         }
> +       /*
> +        * Disable INTC autoidle as it can cause interrupt controller
> +        * to enter unknown state with right combination of sleep / wakeup
> +        * transitions
> +        */
> +       omap_writel(0x0, OMAP34XX_IC_BASE + INTC_SYSCONFIG);
>
>         /*
>         * On EMU/HS devices ROM code restores a SRDC value
> @@ -561,6 +569,8 @@ void omap_sram_idle(void)
>                                                 OMAP3430_GR_MOD,
>
> OMAP3_PRM_VOLTCTRL_OFFSET);
>         }
> +       /* Re-enable interrupt controller autoidle */
> +       omap_writel(OMAP3430_AUTOIDLE, OMAP34XX_IC_BASE + INTC_SYSCONFIG);
>
>         /*
>          * Enable smartreflex after WFI. Only needed if we

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