MPU power domain bank 0 bits are displayed in position of bank 1
in PWRSTS and PREPWRSTS registers. So read them from correct
position
Signed-off-by: Thara Gopinath <thara@xxxxxx>
---
Patch refresh issue.
arch/arm/mach-omap2/powerdomain.c | 19 +++++++++++++++++++
1 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 2594cbf..6c5fee9 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -971,6 +971,16 @@ int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
return -EEXIST;
/*
+ * In 3430, for MPU domain bank 0 status bits
+ * are displayed in the position of bank1 status bits
+ * in PWST . So the hack. Think of a cleaner
+ * way of doing this
+ */
+ if (cpu_is_omap34xx())
+ if (!strcmp("mpu_pwrdm", pwrdm->name))
+ bank = 1;
+
+ /*
* The register bit names below may not correspond to the
* actual names of the bits in each powerdomain's register,
* but the type of value returned is the same for each
@@ -1018,6 +1028,15 @@ int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
return -EEXIST;
/*
+ * In 3430, for MPU domain bank 0 status bits
+ * are displayed in the position of bank1 status bits
+ * in PREPWST . So the hack. Think of a cleaner
+ * way of doing this
+ */
+ if (cpu_is_omap34xx())
+ if (!strcmp("mpu_pwrdm", pwrdm->name))
+ bank = 1;
+ /*
* The register bit names below may not correspond to the
* actual names of the bits in each powerdomain's register,
* but the type of value returned is the same for each
--
1.5.4.7
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