Roger Quadros <rogerq@xxxxxxxxxx> writes: > On 31/10/2024 11:29, Geert Uytterhoeven wrote: >> Commit b9bf5612610aa7e3 ("ARM: dts: am335x-bone-common: Increase MDIO >> reset deassert time") already increased the MDIO reset deassert delay >> from 6.5 to 13 ms, but this may still cause Ethernet PHY probe failures: >> >> SMSC LAN8710/LAN8720 4a101000.mdio:00: probe with driver SMSC LAN8710/LAN8720 failed with error -5 >> >> On BeagleBone Black Rev. C3, ETH_RESETn is controlled by an open-drain >> AND gate. It is pulled high by a 10K resistor, and has a 4.7µF >> capacitor to ground, giving an RC time constant of 47ms. As it takes >> 0.7RC to charge the capacitor above the threshold voltage of a CMOS >> input (VDD/2), the delay should be at least 33ms. Considering the >> typical tolerance of 20% on capacitors, 40ms would be safer. Add an >> additional safety margin and settle for 50ms. >> >> Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> > > Reviewed-by: Roger Quadros <rogerq@xxxxxxxxxx> Reviewed-by: Kevin Hilman <khilman@xxxxxxxxxxxx> Tested-by: Kevin Hilman <khilman@xxxxxxxxxxxx>