On Tue, Aug 11, 2009 at 3:12 PM, Elvis Dowson<elvis.dowson@xxxxxxx> wrote: > Hi, > If I have to interface the TI OMAP 3503 GPIO signals to an FPGA > (Xilinx Virtex-5), which I/O standard should I use. Use LVCMOS at 1.8V if you can not use 1.8 V (get another FPGA, just kidding) then you will need a buffer (level translator) between them. I had great success with http://focus.ti.com/docs/prod/folders/print/txs0108e.html (TXS0108) 8-channel push-pull/ open drain level transceiver. John Sarman > > The options available to me for single ended I/O on the FPGA are : LVCMOS, > LVTTL, HSTL, SSTL, GTL, PCI > > Best regards, > > Elvis > -- > To unsubscribe from this list: send the line "unsubscribe linux-omap" in > the body of a message to majordomo@xxxxxxxxxxxxxxx > More majordomo info at http://vger.kernel.org/majordomo-info.html > -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
