Hi, Thank you for the patch! Yet something to improve: [auto build test ERROR on omap/for-next] [also build test ERROR on v5.13-rc7 next-20210625] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/13145886936-163-com/ARM-omap2-remove-unneeded-variable-errata/20210624-112929 base: https://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git for-next config: arm-randconfig-r004-20210625 (attached as .config) compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 9ca0171a9ffdef5fdb1511d197a3fd72490362de) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install arm cross compiling tool for clang build # apt-get install binutils-arm-linux-gnueabi # https://github.com/0day-ci/linux/commit/d29c977cd4692b7db84c7fa336de0bfe8941584e git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review 13145886936-163-com/ARM-omap2-remove-unneeded-variable-errata/20210624-112929 git checkout d29c977cd4692b7db84c7fa336de0bfe8941584e # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@xxxxxxxxx> All errors (new ones prefixed by >>): >> arch/arm/mach-omap2/dma.c:112:3: error: use of undeclared identifier 'errata' SET_DMA_ERRATA(DMA_ERRATA_IFRAME_BUFFERING); ^ include/linux/omap-dma.h:105:30: note: expanded from macro 'SET_DMA_ERRATA' #define SET_DMA_ERRATA(id) (errata |= (id)) ^ arch/arm/mach-omap2/dma.c:113:3: error: use of undeclared identifier 'errata' SET_DMA_ERRATA(DMA_ERRATA_PARALLEL_CHANNELS); ^ include/linux/omap-dma.h:105:30: note: expanded from macro 'SET_DMA_ERRATA' #define SET_DMA_ERRATA(id) (errata |= (id)) ^ arch/arm/mach-omap2/dma.c:122:3: error: use of undeclared identifier 'errata' SET_DMA_ERRATA(DMA_ERRATA_i378); ^ include/linux/omap-dma.h:105:30: note: expanded from macro 'SET_DMA_ERRATA' #define SET_DMA_ERRATA(id) (errata |= (id)) ^ arch/arm/mach-omap2/dma.c:133:3: error: use of undeclared identifier 'errata' SET_DMA_ERRATA(DMA_ERRATA_i541); ^ include/linux/omap-dma.h:105:30: note: expanded from macro 'SET_DMA_ERRATA' #define SET_DMA_ERRATA(id) (errata |= (id)) ^ arch/arm/mach-omap2/dma.c:142:3: error: use of undeclared identifier 'errata' SET_DMA_ERRATA(DMA_ERRATA_i88); ^ include/linux/omap-dma.h:105:30: note: expanded from macro 'SET_DMA_ERRATA' #define SET_DMA_ERRATA(id) (errata |= (id)) ^ arch/arm/mach-omap2/dma.c:148:2: error: use of undeclared identifier 'errata' SET_DMA_ERRATA(DMA_ERRATA_3_3); ^ include/linux/omap-dma.h:105:30: note: expanded from macro 'SET_DMA_ERRATA' #define SET_DMA_ERRATA(id) (errata |= (id)) ^ arch/arm/mach-omap2/dma.c:158:3: error: use of undeclared identifier 'errata' SET_DMA_ERRATA(DMA_ROMCODE_BUG); ^ include/linux/omap-dma.h:105:30: note: expanded from macro 'SET_DMA_ERRATA' #define SET_DMA_ERRATA(id) (errata |= (id)) ^ 7 errors generated. vim +/errata +112 arch/arm/mach-omap2/dma.c f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 82 f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 83 /* f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 84 * Errata applicable for OMAP2430ES1.0 and all omap2420 f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 85 * f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 86 * I. f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 87 * Erratum ID: Not Available f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 88 * Inter Frame DMA buffering issue DMA will wrongly f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 89 * buffer elements if packing and bursting is enabled. This might f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 90 * result in data gets stalled in FIFO at the end of the block. f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 91 * Workaround: DMA channels must have BUFFERING_DISABLED bit set to f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 92 * guarantee no data will stay in the DMA FIFO in case inter frame f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 93 * buffering occurs f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 94 * f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 95 * II. f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 96 * Erratum ID: Not Available f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 97 * DMA may hang when several channels are used in parallel f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 98 * In the following configuration, DMA channel hanging can occur: f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 99 * a. Channel i, hardware synchronized, is enabled f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 100 * b. Another channel (Channel x), software synchronized, is enabled. f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 101 * c. Channel i is disabled before end of transfer f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 102 * d. Channel i is reenabled. f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 103 * e. Steps 1 to 4 are repeated a certain number of times. f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 104 * f. A third channel (Channel y), software synchronized, is enabled. f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 105 * Channel x and Channel y may hang immediately after step 'f'. f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 106 * Workaround: f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 107 * For any channel used - make sure NextLCH_ID is set to the value j. f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 108 */ f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 109 if (cpu_is_omap2420() || (cpu_is_omap2430() && f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 110 (omap_type() == OMAP2430_REV_ES1_0))) { f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 111 f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 @112 SET_DMA_ERRATA(DMA_ERRATA_IFRAME_BUFFERING); f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 113 SET_DMA_ERRATA(DMA_ERRATA_PARALLEL_CHANNELS); f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 114 } f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 115 f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 116 /* f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 117 * Erratum ID: i378: OMAP2+: sDMA Channel is not disabled f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 118 * after a transaction error. f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 119 * Workaround: SW should explicitely disable the channel. f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 120 */ f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 121 if (cpu_class_is_omap2()) f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 122 SET_DMA_ERRATA(DMA_ERRATA_i378); f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 123 f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 124 /* f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 125 * Erratum ID: i541: sDMA FIFO draining does not finish f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 126 * If sDMA channel is disabled on the fly, sDMA enters standby even f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 127 * through FIFO Drain is still in progress f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 128 * Workaround: Put sDMA in NoStandby more before a logical channel is f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 129 * disabled, then put it back to SmartStandby right after the channel f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 130 * finishes FIFO draining. f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 131 */ f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 132 if (cpu_is_omap34xx()) f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 133 SET_DMA_ERRATA(DMA_ERRATA_i541); f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 134 f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 135 /* f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 136 * Erratum ID: i88 : Special programming model needed to disable DMA f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 137 * before end of block. f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 138 * Workaround: software must ensure that the DMA is configured in No f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 139 * Standby mode(DMAx_OCP_SYSCONFIG.MIDLEMODE = "01") f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 140 */ f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 141 if (omap_type() == OMAP3430_REV_ES1_0) f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 142 SET_DMA_ERRATA(DMA_ERRATA_i88); f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 143 f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 144 /* f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 145 * Erratum 3.2/3.3: sometimes 0 is returned if CSAC/CDAC is f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 146 * read before the DMA controller finished disabling the channel. f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 147 */ f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 148 SET_DMA_ERRATA(DMA_ERRATA_3_3); f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 149 f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 150 /* f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 151 * Erratum ID: Not Available f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 152 * A bug in ROM code leaves IRQ status for channels 0 and 1 uncleared f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 153 * after secure sram context save and restore. f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 154 * Work around: Hence we need to manually clear those IRQs to avoid f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 155 * spurious interrupts. This affects only secure devices. f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 156 */ f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 157 if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP)) f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 158 SET_DMA_ERRATA(DMA_ROMCODE_BUG); f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 159 d29c977cd4692b gushengxian 2021-06-23 160 return 0; f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 161 } f31cc9622d75c1 G, Manjunath Kondaiah 2010-12-20 162 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx
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