Hi,
* Woodruff, Richard <r-woodruff2@xxxxxx> [210607 15:40]:
> Guess: this bit in JTAG script used for IVA tests probably is missing and needs to be worked in. The generic linux-omap clock code probably handles the IVA clock but maybe not the resets.
>
> /* Enable IVA-ss functional clock (set bit 0) */
> (*(int*)0x49006800) |= 0x1;
>
> /* Release l3s_idle_req */
> (*(int*)0x49006810) |= (1 << 1);
>
> /* Release L3S reset and power-on reset (clear bit 1) at the same time */
> (*(int*)0x49006850) &= ~(( 1 << 1));
Heh and I thought nobody is using 2430 any longer :)
FYI, the current mainline kernel actually can deal with all that using
reset driver and genpd, see for example commits:
ae57d1558908 ("ARM: dts: Configure interconnect target module for dra7 iva")
effe89e40037 ("soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva")
Similar setup should also work for 2430 but needs the power domains
configured for drivers/soc/ti/omap_prm.c at least for iva.
David, I think what you're seeing is iva getting released from reset with
an unconfigured MMU, and then the system will hang.
Regards,
Tony
