Large devices are bigger than >64MB in size. - Fix the SPI clock generation in order to produce the desired frequency. - Since the TI QSPI IP block only maps 64MB of MMIO, use MMIO below the 64MB boundary and software generated transfers above. - Optimize the software generated transfers for dual and quad I/O read operations. The speed-up is 3.5x for quad I/O reads. Tested using raw accesses (mtd_debug) and JFFS2 FS read/write/erase; in single, dual and quad modes. All accesses have been checked on the logic analyzer. Jean Pihet (3): TI QSPI: Fix fclk frequency TI QSPI: support large flash devices TI QSPI: optimize transfers for dual and quad read drivers/spi/spi-ti-qspi.c | 83 +++++++++++++++++++++++++++++---------- 1 file changed, 63 insertions(+), 20 deletions(-) -- 2.23.0
