Re: [PATCH] ARM: dts: dra7: fix cpsw mdio fck clock

[Tony Lindgren <tony@xxxxxxxxxxx>]

* Grygorii Strashko <grygorii.strashko@xxxxxx> [191118 04:20]:
> The DRA7 CPSW MDIO functional clock (gmac_clkctrl DRA7_GMAC_GMAC_CLKCTRL 0)
> is specified incorrectly, which is caused incorrect MDIO bus clock
> configuration MDCLK. The correct CPSW MDIO functional clock is
> gmac_main_clk (125MHz), which is the same as CPSW fck. Hence fix it.

Thanks applying into omap-for-v5.5/dt.

Tony