Re: [PATCH 0/4] clk: ti: re-work divider clock support

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On 28/10/2019 11:59, Stephen Boyd wrote:
Quoting Tero Kristo (2019-10-24 01:03:20)
On 02/10/2019 15:06, Tero Kristo wrote:
Hi,

The existing divider clock support appears to have an inherent bug
because of the bit field width implementation and limitation of divider
values based on this. The limitation by bit field only is not enough,
as we can have divider settings which accept only certain range of
dividers within the full range of the bit-field.

Because of this, the divider clock is re-implemented to use min,max,mask
values instead of just the bit-field.

Queued this up for 5.4 fixes, thanks.

Is this a regression in 5.4-rc series? Please only send fixes for code
that is broken by code that went into the merge window, or is super
annoying and broken but we somehow didn't notice. If not, just let it
sit in -next until the next merge window and it may still be backported
to stable trees anyway.

Tony/Tomi, how much do you care which one this hits into?

-Tero


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