* Graeme Smecher <gsmecher@xxxxxxxxxxxxxxxxxxx> [190103 23:17]:
> --- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
> @@ -539,6 +539,58 @@ static struct omap_hwmod_ocp_if dm81xx_l4_ls__gpio2 = {
> .user = OCP_USER_MPU,
> };
>
> +static struct omap_hwmod_opt_clk gpio3_opt_clks[] = {
> + { .role = "dbclk", .clk = "sysclk18_ck" },
> +};
> +
> +static struct omap_hwmod dm81xx_gpio3_hwmod = {
> + .name = "gpio3",
> + .clkdm_name = "alwon_l3s_clkdm",
> + .class = &dm81xx_gpio_hwmod_class,
> + .main_clk = "sysclk6_ck",
> + .prcm = {
> + .omap4 = {
> + .clkctrl_offs = DM81XX_CM_ALWON_GPIO_1_CLKCTRL,
> + .modulemode = MODULEMODE_SWCTRL,
> + },
> + },
> + .opt_clks = gpio3_opt_clks,
> + .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks),
> +};
> +
> +static struct omap_hwmod_ocp_if dm81xx_l4_ls__gpio3 = {
> + .master = &dm81xx_l4_ls_hwmod,
> + .slave = &dm81xx_gpio3_hwmod,
> + .clk = "sysclk6_ck",
> + .user = OCP_USER_MPU,
> +};
Good to hear things are working for the modules with
shared clockctrl registers :)
So we should now be able to handle the interconnect
target modules using ti-sysc and dts entries. But as
I'm using the hwmod data to generate the dts data,
seems it's best to apply your changes first and then
I can generate the dm814x-l4.dtsi dts data.
Regards,
Tony
