On 19/11/2018 18.19, Tony Lindgren wrote: > * Peter Ujfalusi <peter.ujfalusi@xxxxxx> [181119 10:16]: >> On 2018-11-13 20:06, Tony Lindgren wrote: >>> Looks like the IRQ_TYPE_NONE issue still is there for omap5 and >>> should be fixed with IRQ_TYPE_HIGH. >>> >>> No idea about why palmas interrupts would stop working though, >>> Peter, do you have any ideas on this one? >> >> No, I don't. >> The INT polarity can be changed in Palmas. >> based on the pdata->irq_flags (queried via irqd_get_trigger_type()) >> the code configures it: >> >> if (pdata->irq_flags & IRQ_TYPE_LEVEL_HIGH) >> reg = PALMAS_POLARITY_CTRL_INT_POLARITY; >> else >> reg = 0; >> >> and we pass the same irq_flags to the regmap_add_irq_chip() >> IRQ_TYPE_LEVEL_HIGH == IRQF_TRIGGER_HIGH == 0x00000004 >> >> A change in DT should be enough, no need to patch palmas.c, imho. > > But it's not. I'm now wondering if wakeupgen is inverting the > polarity for this interrupt? > > GIC docs say this about SPI interrupts: > > "SPI is triggered on a rising edge or is active-HIGH level-sensitive." > > So when setting IRQ_TYPE_LEVEL_HIGH in dts, we still must not > invert the polarity in palmas while tegra needs to. So either > tegra114 hardware is inverting the polarity, or omap5 wakeupgen > is. > > Does the palmas trm say which way PALMAS_POLARITY_CTRL > triggers if PALMAS_POLARITY_CTRL_INT_POLARITY is set? bit7 INT_POLARITY Select the polarity of the INT output line 0: Interrupt line (INT) is low when interrupt is pending (default) RW 1: Interrupt line (INT) is high when interrupt is pending > Also note that dra7 is using a gpio for palmas interrupt. > > Regards, > > Tony > - Péter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
