Hi Tony, coming back to this nasty thing. First thank you for your ideas. The general situation on gta04a4 (on a5 there is a newer wifi chip) is the following: On mainline we have around 200mA of additional current consumption if wlan is enabled and connected without data transfer. We get 100KByte/s data transfers downstream. With the dirty letux patch (enabling SDIO_IRQ and adding a pair of pm_runtime_get_sync()/put() in omap_hsmmc_enable_sdio_irq()), the values are 30mA and > 1000KByte/s. The wifi chip (with libertas driver) just behaves better with low latency sdio irq. Usually there are sdio irqs every 100ms, so with the default runtime autosuspend value we have a perfect setup for testing all kind of sdio irq race conditions. Maybe this 100ms thing can be improved, maybe not. But that is another topic. It is clear that disabling wifi if not in use is quite a good idea. Just that for the background. On Fri, 7 Sep 2018 10:08:50 -0700 Tony Lindgren <tony@xxxxxxxxxxx> wrote: > * Andreas Kemnade <andreas@xxxxxxxxxxxx> [180907 16:52]: > > sdio irq + wakeirq via remapped dat1 as gpio + 4 bit -(=reverted) > > generic_wakeirq_patch = does not work > > And here's where I suspect that in deeper SoC idle states > with floating lines confuse the SDIO card :) > Why only here? Well if there appears a problem by *reverting* a patch, then there is a nice and simple solution. ;-) Well, confusion could make the card release dat1 in a bad moment so that the irq will be lost. The SDIO simplified spec is missing some sections about 4bit and irq. So it is a good point. > Maybe try adding pinctrl "idle" state that puts the rest > of the SDIO pins to safe mode (7) and see if that helps? Probably a good idea even for the better working setups I tested. Will try that. I have tried several things but not mode 7. Just to make sure that you correctly understand what I was doing. "wakeirq via remapped dat1 as gpio" means a separate idle pinctl state with dat1 as mode 4. [...] Now to the real interesting problem behavior if wifi is power off: > > I guess it's possible that you now have the SoC entering > off mode during idle and have a glitch on the power > GPIO as omap3-evm has. > There should be really no glitch: wlan reset-gpio is behind an i2c to io chip. Power is behind twl4030. Both are turned off. So everythng on the wlan side of the level shifter should be logical low. With the result that we would have a logical low on the dat1. I exported the gpio and checked the level. It was low. If I understand the code correctly the wakeirq stuff is enabled regardless whether sdio irqs are wanted or not. Before using the generic wakeirq framework, the wakeirq stuff was disabled when there are sdio irqs disabled. So we either need a third pinctl state for that no-sdio-irq situation or (or maybe and) disable the wakeirq stuff then. Regards, Andreas
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