Re: OMAP3 interrupt latency much worse when CPU idle

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On Thu, Nov 23, 2017 at 11:26:04AM +0100, Ladislav Michl wrote:
> On Thu, Nov 23, 2017 at 10:35:42AM +0100, Ladislav Michl wrote:
> > On Thu, Nov 16, 2017 at 03:04:48PM -0600, Grygorii Strashko wrote:
> > [snip]
> > > I recommend to disable CPU idle completely in config and re-check test,
> > > before continue with other things.
> > 
> > Strangely enough latency is much worse with CONFIG_CPU_IDLE disabled.
> 
> While it is better with:
> CONFIG_HZ_PERIODIC=y
> CONFIG_CPU_FREQ=n
> CONFIG_PM=n
> 
> But both ehci and musb does not see any device connected and:
> 
> IRQ: Found an INTC at 0xfa200000 (revision 4.0) with 96 interrupts
> Clocking rate (Crystal/Core/MPU): 26.0/400/600 MHz
> ------------[ cut here ]------------
> WARNING: CPU: 0 PID: 0 at arch/arm/mach-omap2/omap_hwmod.c:2098 _enable+0x48/0x234
> omap_hwmod: timer1: enabled state can only be entered from initialized, idle, or disabled state

The state is _HWMOD_STATE_ENABLED here and it cames from:

static void __init __maybe_unused omap_hwmod_init_postsetup(void)
{
        u8 postsetup_state;

        /* Set the default postsetup state for all hwmods */
#ifdef CONFIG_PM
        postsetup_state = _HWMOD_STATE_IDLE;
#else
        postsetup_state = _HWMOD_STATE_ENABLED;
#endif
        omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);

        omap_pm_if_early_init();
}

in arch/arm/mach-omap2/io.c

Just in case someone has time to look at this.

> Modules linked in:
> CPU: 0 PID: 0 Comm: swapper Not tainted 4.14.1-00048-gfa283847c99a #12
> Hardware name: Generic OMAP36xx (Flattened Device Tree)
> [<c010c304>] (unwind_backtrace) from [<c010a708>] (show_stack+0x10/0x14)
> [<c010a708>] (show_stack) from [<c012395c>] (__warn+0xdc/0xf8)
> [<c012395c>] (__warn) from [<c01239ac>] (warn_slowpath_fmt+0x34/0x44)
> [<c01239ac>] (warn_slowpath_fmt) from [<c0117e50>] (_enable+0x48/0x234)
> [<c0117e50>] (_enable) from [<c01184e0>] (omap_hwmod_enable+0x18/0x28)
> [<c01184e0>] (omap_hwmod_enable) from [<c07083a8>] (omap_dm_timer_init_one+0x150/0x248)
> [<c07083a8>] (omap_dm_timer_init_one) from [<c0708550>] (__omap_sync32k_timer_init.constprop.1+0x74/0x234)
> [<c0708550>] (__omap_sync32k_timer_init.constprop.1) from [<c0708734>] (omap_init_time+0x24/0x38)
> [<c0708734>] (omap_init_time) from [<c0700abc>] (start_kernel+0x208/0x378)
> [<c0700abc>] (start_kernel) from [<80008078>] (0x80008078)
> ---[ end trace 6bf4eb748e85f1ee ]---
> OMAP clockevent source: timer1 at 32768 Hz
> ------------[ cut here ]------------
> WARNING: CPU: 0 PID: 0 at arch/arm/mach-omap2/omap_hwmod.c:2098 _enable+0x48/0x234
> omap_hwmod: counter_32k: enabled state can only be entered from initialized, idle, or disabled state
> Modules linked in:
> CPU: 0 PID: 0 Comm: swapper Tainted: G        W       4.14.1-00048-gfa283847c99a #12
> Hardware name: Generic OMAP36xx (Flattened Device Tree)
> [<c010c304>] (unwind_backtrace) from [<c010a708>] (show_stack+0x10/0x14)
> [<c010a708>] (show_stack) from [<c012395c>] (__warn+0xdc/0xf8)
> [<c012395c>] (__warn) from [<c01239ac>] (warn_slowpath_fmt+0x34/0x44)
> [<c01239ac>] (warn_slowpath_fmt) from [<c0117e50>] (_enable+0x48/0x234)
> [<c0117e50>] (_enable) from [<c01184e0>] (omap_hwmod_enable+0x18/0x28)
> [<c01184e0>] (omap_hwmod_enable) from [<c07086bc>] (__omap_sync32k_timer_init.constprop.1+0x1e0/0x234)
> [<c07086bc>] (__omap_sync32k_timer_init.constprop.1) from [<c0708734>] (omap_init_time+0x24/0x38)
> [<c0708734>] (omap_init_time) from [<c0700abc>] (start_kernel+0x208/0x378)
> [<c0700abc>] (start_kernel) from [<80008078>] (0x80008078)
> ---[ end trace 6bf4eb748e85f1ef ]---
> omap2_sync32k_clocksource_init: failed to enable counter_32k module (-22)
> 
> Is it expected?
> 
> 	ladis
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