[PATCH 12/17] ARM: dts: Add missing aess node and binding for omap4

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On omap4 we're missing the aess node with it's related "ti,hwmods"
property that the SoC interconnect code needs.

Note that this will only show up as a bug with "doesn't have
mpu register target base" boot errors when the legacy platform
data is removed.

Cc: Liam Girdwood <lgirdwood@xxxxxxxxx>
Cc: Mark Brown <broonie@xxxxxxxxxx>
Cc: Peter Ujfalusi <peter.ujfalusi@xxxxxx>
Signed-off-by: Tony Lindgren <tony@xxxxxxxxxxx>
---
 .../devicetree/bindings/sound/ti-aess.txt          | 33 ++++++++++++++++++++++
 arch/arm/boot/dts/omap4.dtsi                       |  8 ++++++
 2 files changed, 41 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/sound/ti-aess.txt

diff --git a/Documentation/devicetree/bindings/sound/ti-aess.txt b/Documentation/devicetree/bindings/sound/ti-aess.txt
new file mode 100644
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/ti-aess.txt
@@ -0,0 +1,33 @@
+Texas Instruments Audio Engine Subsystem (AESS) binding
+
+AESS performs real-time signal processing on TI SoCs.
+
+
+Required properties:
+
+compatible: Shall be one of the following:
+	    "ti,omap4-aess"
+
+reg: Shall contain the device instance IO range
+
+interrupts: Shall contain the device instance interrupt
+
+
+Optional properties:
+
+reg-names: Shall contain the IO range names if multiple IO
+	   ranges are used by the SoC
+
+ti,hwmods: Shall contain the TI interconnect module name if needed
+	   by the SoC
+
+
+Example:
+
+	aess: aess@401f1000 {
+		compatible = "ti,omap4-aess";
+		reg = <0x401f1000 0x400>, /* MPU private access */
+		      <0x490f1000 0x400>; /* L3 Interconnect */
+		reg-names = "mpu", "dma";
+		ti,hwmods = "aess";
+	};
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -768,6 +768,14 @@
 			ti,hwmods = "slimbus1";
 		};
 
+		aess: aess@401f1000 {
+			compatible = "ti,omap4-aess";
+			reg = <0x401f1000 0x400>, /* MPU private access */
+			      <0x490f1000 0x400>; /* L3 Interconnect */
+			reg-names = "mpu", "dma";
+			ti,hwmods = "aess";
+		};
+
 		mcbsp4: mcbsp@48096000 {
 			compatible = "ti,omap4-mcbsp";
 			reg = <0x48096000 0xff>; /* L4 Interconnect */
-- 
2.14.1
--
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