On Thu, Jul 14, 2016 at 10:59 PM, Ran Shalit <ranshalit@xxxxxxxxx> wrote:
> On Thu, Jul 14, 2016 at 12:22 PM, Vignesh R <vigneshr@xxxxxx> wrote:
>>
>>
>> On Thursday 14 July 2016 02:29 PM, Ran Shalit wrote:
>>> Hello,
>>>
>>> I try to reference in kernel code mcspi status register (MCSPI_CHxSTAT
>>> - 0x30 offset from 0x48098000 or 0x4809A000) in kernel code, but it
>>> results in segmentation fault:
>>>
>>> ioaddr = ioremap_nocache(0x4809A000, SZ_4K);
>>> *(( unsigned int*) (ioaddr+0)) = 0x12;
>>> val = *(( unsigned int*) (ioaddr+0x30));
>>> printk("mymem 0x%x\n",val); <<-----------------
>>>
>>> I have re-checked the config of kernel, is it related to some device using spi ?
>>>
>>>
>>> [ 24.126739] Unhandled fault: external abort on non-linefetch (0x1028)
>>
>>
>> Usually, this means clock to the SPI controller is not enabled. Did you
>> do a pm_runtime_enable() and pm_runtime_get_sync() before accessing the
>> register?
>>
>
> Do you mean internal clock into spi controller (not output spi clock pin) ?
> I'll try to see if there is such register in omap3530.
>
It seems that clk/prcm are enabled:
val = *(volatile U32 *)CM_FCLKEN1_CORE;
val |=(OMAP35XX_EN_MCSPI1 | OMAP35XX_EN_MCSPI2 |
OMAP35XX_EN_MCSPI3 | OMAP35XX_EN_MCSPI4);
*(volatile U32 *)CM_FCLKEN1_CORE = val;
val = *(volatile U32 *)CM_ICLKEN1_CORE;
val |=(OMAP35XX_EN_MCSPI1 | OMAP35XX_EN_MCSPI2 |
OMAP35XX_EN_MCSPI3 | OMAP35XX_EN_MCSPI4);
*(volatile U32 *)CM_ICLKEN1_CORE = val;
Regards,
Ran
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
