Add a function which sets the timer source from the clocks
binding on dm_timer_prepare call.
In case the clocks property is not valid, it falls back to
the set_source() with 32_KHZ clock as default.
Suggested-by: Tony Lindgren <tony@xxxxxxxxxxx>
Signed-off-by: Neil Armstrong <narmstrong@xxxxxxxxxxxx>
---
arch/arm/plat-omap/dmtimer.c | 32 ++++++++++++++++++++++++++++++--
1 file changed, 30 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 8ca94d3..5e8aece 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -137,9 +137,33 @@ static int omap_dm_timer_reset(struct omap_dm_timer *timer)
return 0;
}
+static int omap_dm_timer_of_set_source(struct omap_dm_timer *timer)
+{
+ int ret;
+ struct clk *parent;
+
+ if (unlikely(!timer))
+ return -EINVAL;
+
+ if (IS_ERR(timer->fclk))
+ return -EINVAL;
+
+ parent = clk_get(&timer->pdev->dev, NULL);
+ if (IS_ERR(parent))
+ return -ENODEV;
+
+ ret = clk_set_parent(timer->fclk, parent);
+ if (ret < 0)
+ pr_err("%s: failed to set parent\n", __func__);
+
+ clk_put(parent);
+
+ return ret;
+}
+
static int omap_dm_timer_prepare(struct omap_dm_timer *timer)
{
- int rc;
+ int rc, ret;
/*
* FIXME: OMAP1 devices do not use the clock framework for dmtimers so
@@ -166,7 +190,11 @@ static int omap_dm_timer_prepare(struct omap_dm_timer *timer)
__omap_dm_timer_enable_posted(timer);
omap_dm_timer_disable(timer);
- return omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
+ ret = omap_dm_timer_of_set_source(timer);
+ if (ret < 0 && ret == -ENODEV)
+ return omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
+
+ return ret;
}
static inline u32 omap_dm_timer_reserved_systimer(int id)
--
1.9.1
--
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