Clock and powerdomain data can now be moved partially to DT. Some init
data is still left to the existing data files, to act as templates for
the DT based data.
Signed-off-by: Tero Kristo <t-kristo@xxxxxx>
---
arch/arm/mach-omap2/clockdomains44xx_data.c | 327 +++------------------------
arch/arm/mach-omap2/powerdomains44xx_data.c | 124 +++-------
2 files changed, 60 insertions(+), 391 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index 95192a0..823f546 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -21,6 +21,7 @@
#include <linux/kernel.h>
#include <linux/io.h>
+#include <linux/of.h>
#include "clockdomain.h"
#include "cm1_44xx.h"
@@ -31,413 +32,145 @@
#include "prcm44xx.h"
#include "prcm_mpu44xx.h"
-/* Static Dependencies for OMAP4 Clock Domains */
-
-static struct clkdm_dep d2d_wkup_sleep_deps[] = {
- { .clkdm_name = "abe_clkdm" },
- { .clkdm_name = "ivahd_clkdm" },
- { .clkdm_name = "l3_1_clkdm" },
- { .clkdm_name = "l3_2_clkdm" },
- { .clkdm_name = "l3_emif_clkdm" },
- { .clkdm_name = "l3_init_clkdm" },
- { .clkdm_name = "l4_cfg_clkdm" },
- { .clkdm_name = "l4_per_clkdm" },
- { NULL },
-};
-
-static struct clkdm_dep ducati_wkup_sleep_deps[] = {
- { .clkdm_name = "abe_clkdm" },
- { .clkdm_name = "ivahd_clkdm" },
- { .clkdm_name = "l3_1_clkdm" },
- { .clkdm_name = "l3_2_clkdm" },
- { .clkdm_name = "l3_dss_clkdm" },
- { .clkdm_name = "l3_emif_clkdm" },
- { .clkdm_name = "l3_gfx_clkdm" },
- { .clkdm_name = "l3_init_clkdm" },
- { .clkdm_name = "l4_cfg_clkdm" },
- { .clkdm_name = "l4_per_clkdm" },
- { .clkdm_name = "l4_secure_clkdm" },
- { .clkdm_name = "l4_wkup_clkdm" },
- { .clkdm_name = "tesla_clkdm" },
- { NULL },
-};
-
-static struct clkdm_dep iss_wkup_sleep_deps[] = {
- { .clkdm_name = "ivahd_clkdm" },
- { .clkdm_name = "l3_1_clkdm" },
- { .clkdm_name = "l3_emif_clkdm" },
- { NULL },
-};
-
-static struct clkdm_dep ivahd_wkup_sleep_deps[] = {
- { .clkdm_name = "l3_1_clkdm" },
- { .clkdm_name = "l3_emif_clkdm" },
- { NULL },
-};
-
-static struct clkdm_dep l3_dma_wkup_sleep_deps[] = {
- { .clkdm_name = "abe_clkdm" },
- { .clkdm_name = "ducati_clkdm" },
- { .clkdm_name = "ivahd_clkdm" },
- { .clkdm_name = "l3_1_clkdm" },
- { .clkdm_name = "l3_dss_clkdm" },
- { .clkdm_name = "l3_emif_clkdm" },
- { .clkdm_name = "l3_init_clkdm" },
- { .clkdm_name = "l4_cfg_clkdm" },
- { .clkdm_name = "l4_per_clkdm" },
- { .clkdm_name = "l4_secure_clkdm" },
- { .clkdm_name = "l4_wkup_clkdm" },
- { NULL },
-};
-
-static struct clkdm_dep l3_dss_wkup_sleep_deps[] = {
- { .clkdm_name = "ivahd_clkdm" },
- { .clkdm_name = "l3_2_clkdm" },
- { .clkdm_name = "l3_emif_clkdm" },
- { NULL },
-};
-
-static struct clkdm_dep l3_gfx_wkup_sleep_deps[] = {
- { .clkdm_name = "ivahd_clkdm" },
- { .clkdm_name = "l3_1_clkdm" },
- { .clkdm_name = "l3_emif_clkdm" },
- { NULL },
-};
-
-static struct clkdm_dep l3_init_wkup_sleep_deps[] = {
- { .clkdm_name = "abe_clkdm" },
- { .clkdm_name = "ivahd_clkdm" },
- { .clkdm_name = "l3_emif_clkdm" },
- { .clkdm_name = "l4_cfg_clkdm" },
- { .clkdm_name = "l4_per_clkdm" },
- { .clkdm_name = "l4_secure_clkdm" },
- { .clkdm_name = "l4_wkup_clkdm" },
- { NULL },
-};
-
-static struct clkdm_dep l4_secure_wkup_sleep_deps[] = {
- { .clkdm_name = "l3_1_clkdm" },
- { .clkdm_name = "l3_emif_clkdm" },
- { .clkdm_name = "l4_per_clkdm" },
- { NULL },
-};
-
-static struct clkdm_dep mpu_wkup_sleep_deps[] = {
- { .clkdm_name = "abe_clkdm" },
- { .clkdm_name = "ducati_clkdm" },
- { .clkdm_name = "ivahd_clkdm" },
- { .clkdm_name = "l3_1_clkdm" },
- { .clkdm_name = "l3_2_clkdm" },
- { .clkdm_name = "l3_dss_clkdm" },
- { .clkdm_name = "l3_emif_clkdm" },
- { .clkdm_name = "l3_gfx_clkdm" },
- { .clkdm_name = "l3_init_clkdm" },
- { .clkdm_name = "l4_cfg_clkdm" },
- { .clkdm_name = "l4_per_clkdm" },
- { .clkdm_name = "l4_secure_clkdm" },
- { .clkdm_name = "l4_wkup_clkdm" },
- { .clkdm_name = "tesla_clkdm" },
- { NULL },
-};
-
-static struct clkdm_dep tesla_wkup_sleep_deps[] = {
- { .clkdm_name = "abe_clkdm" },
- { .clkdm_name = "ivahd_clkdm" },
- { .clkdm_name = "l3_1_clkdm" },
- { .clkdm_name = "l3_2_clkdm" },
- { .clkdm_name = "l3_emif_clkdm" },
- { .clkdm_name = "l3_init_clkdm" },
- { .clkdm_name = "l4_cfg_clkdm" },
- { .clkdm_name = "l4_per_clkdm" },
- { .clkdm_name = "l4_wkup_clkdm" },
- { NULL },
-};
-
static struct clockdomain l4_cefuse_44xx_clkdm = {
- .name = "l4_cefuse_clkdm",
- .pwrdm = { .name = "cefuse_pwrdm" },
- .prcm_partition = OMAP4430_CM2_PARTITION,
- .cm_inst = OMAP4430_CM2_CEFUSE_INST,
- .clkdm_offs = OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
};
static struct clockdomain l4_cfg_44xx_clkdm = {
- .name = "l4_cfg_clkdm",
- .pwrdm = { .name = "core_pwrdm" },
- .prcm_partition = OMAP4430_CM2_PARTITION,
- .cm_inst = OMAP4430_CM2_CORE_INST,
- .clkdm_offs = OMAP4430_CM2_CORE_L4CFG_CDOFFS,
.dep_bit = OMAP4430_L4CFG_STATDEP_SHIFT,
.flags = CLKDM_CAN_HWSUP,
};
static struct clockdomain tesla_44xx_clkdm = {
- .name = "tesla_clkdm",
- .pwrdm = { .name = "tesla_pwrdm" },
- .prcm_partition = OMAP4430_CM1_PARTITION,
- .cm_inst = OMAP4430_CM1_TESLA_INST,
- .clkdm_offs = OMAP4430_CM1_TESLA_TESLA_CDOFFS,
.dep_bit = OMAP4430_TESLA_STATDEP_SHIFT,
- .wkdep_srcs = tesla_wkup_sleep_deps,
- .sleepdep_srcs = tesla_wkup_sleep_deps,
.flags = CLKDM_CAN_HWSUP_SWSUP,
};
static struct clockdomain l3_gfx_44xx_clkdm = {
- .name = "l3_gfx_clkdm",
- .pwrdm = { .name = "gfx_pwrdm" },
- .prcm_partition = OMAP4430_CM2_PARTITION,
- .cm_inst = OMAP4430_CM2_GFX_INST,
- .clkdm_offs = OMAP4430_CM2_GFX_GFX_CDOFFS,
.dep_bit = OMAP4430_GFX_STATDEP_SHIFT,
- .wkdep_srcs = l3_gfx_wkup_sleep_deps,
- .sleepdep_srcs = l3_gfx_wkup_sleep_deps,
.flags = CLKDM_CAN_HWSUP_SWSUP,
};
static struct clockdomain ivahd_44xx_clkdm = {
- .name = "ivahd_clkdm",
- .pwrdm = { .name = "ivahd_pwrdm" },
- .prcm_partition = OMAP4430_CM2_PARTITION,
- .cm_inst = OMAP4430_CM2_IVAHD_INST,
- .clkdm_offs = OMAP4430_CM2_IVAHD_IVAHD_CDOFFS,
.dep_bit = OMAP4430_IVAHD_STATDEP_SHIFT,
- .wkdep_srcs = ivahd_wkup_sleep_deps,
- .sleepdep_srcs = ivahd_wkup_sleep_deps,
.flags = CLKDM_CAN_HWSUP_SWSUP,
};
static struct clockdomain l4_secure_44xx_clkdm = {
- .name = "l4_secure_clkdm",
- .pwrdm = { .name = "l4per_pwrdm" },
- .prcm_partition = OMAP4430_CM2_PARTITION,
- .cm_inst = OMAP4430_CM2_L4PER_INST,
- .clkdm_offs = OMAP4430_CM2_L4PER_L4SEC_CDOFFS,
.dep_bit = OMAP4430_L4SEC_STATDEP_SHIFT,
- .wkdep_srcs = l4_secure_wkup_sleep_deps,
- .sleepdep_srcs = l4_secure_wkup_sleep_deps,
.flags = CLKDM_CAN_HWSUP_SWSUP,
};
static struct clockdomain l4_per_44xx_clkdm = {
- .name = "l4_per_clkdm",
- .pwrdm = { .name = "l4per_pwrdm" },
- .prcm_partition = OMAP4430_CM2_PARTITION,
- .cm_inst = OMAP4430_CM2_L4PER_INST,
- .clkdm_offs = OMAP4430_CM2_L4PER_L4PER_CDOFFS,
.dep_bit = OMAP4430_L4PER_STATDEP_SHIFT,
.flags = CLKDM_CAN_HWSUP_SWSUP,
};
static struct clockdomain abe_44xx_clkdm = {
- .name = "abe_clkdm",
- .pwrdm = { .name = "abe_pwrdm" },
- .prcm_partition = OMAP4430_CM1_PARTITION,
- .cm_inst = OMAP4430_CM1_ABE_INST,
- .clkdm_offs = OMAP4430_CM1_ABE_ABE_CDOFFS,
.dep_bit = OMAP4430_ABE_STATDEP_SHIFT,
.flags = CLKDM_CAN_HWSUP_SWSUP,
};
static struct clockdomain l3_instr_44xx_clkdm = {
- .name = "l3_instr_clkdm",
- .pwrdm = { .name = "core_pwrdm" },
- .prcm_partition = OMAP4430_CM2_PARTITION,
- .cm_inst = OMAP4430_CM2_CORE_INST,
- .clkdm_offs = OMAP4430_CM2_CORE_L3INSTR_CDOFFS,
};
static struct clockdomain l3_init_44xx_clkdm = {
- .name = "l3_init_clkdm",
- .pwrdm = { .name = "l3init_pwrdm" },
- .prcm_partition = OMAP4430_CM2_PARTITION,
- .cm_inst = OMAP4430_CM2_L3INIT_INST,
- .clkdm_offs = OMAP4430_CM2_L3INIT_L3INIT_CDOFFS,
.dep_bit = OMAP4430_L3INIT_STATDEP_SHIFT,
- .wkdep_srcs = l3_init_wkup_sleep_deps,
- .sleepdep_srcs = l3_init_wkup_sleep_deps,
.flags = CLKDM_CAN_HWSUP_SWSUP,
};
static struct clockdomain d2d_44xx_clkdm = {
- .name = "d2d_clkdm",
- .pwrdm = { .name = "core_pwrdm" },
- .prcm_partition = OMAP4430_CM2_PARTITION,
- .cm_inst = OMAP4430_CM2_CORE_INST,
- .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS,
- .wkdep_srcs = d2d_wkup_sleep_deps,
- .sleepdep_srcs = d2d_wkup_sleep_deps,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
};
static struct clockdomain mpu0_44xx_clkdm = {
- .name = "mpu0_clkdm",
- .pwrdm = { .name = "cpu0_pwrdm" },
- .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
- .cm_inst = OMAP4430_PRCM_MPU_CPU0_INST,
- .clkdm_offs = OMAP4430_PRCM_MPU_CPU0_CPU0_CDOFFS,
- .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
-};
-
-static struct clockdomain mpu1_44xx_clkdm = {
- .name = "mpu1_clkdm",
- .pwrdm = { .name = "cpu1_pwrdm" },
- .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
- .cm_inst = OMAP4430_PRCM_MPU_CPU1_INST,
- .clkdm_offs = OMAP4430_PRCM_MPU_CPU1_CPU1_CDOFFS,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
};
static struct clockdomain l3_emif_44xx_clkdm = {
- .name = "l3_emif_clkdm",
- .pwrdm = { .name = "core_pwrdm" },
- .prcm_partition = OMAP4430_CM2_PARTITION,
- .cm_inst = OMAP4430_CM2_CORE_INST,
- .clkdm_offs = OMAP4430_CM2_CORE_MEMIF_CDOFFS,
.dep_bit = OMAP4430_MEMIF_STATDEP_SHIFT,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
};
static struct clockdomain l4_ao_44xx_clkdm = {
- .name = "l4_ao_clkdm",
- .pwrdm = { .name = "always_on_core_pwrdm" },
- .prcm_partition = OMAP4430_CM2_PARTITION,
- .cm_inst = OMAP4430_CM2_ALWAYS_ON_INST,
- .clkdm_offs = OMAP4430_CM2_ALWAYS_ON_ALWON_CDOFFS,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
};
static struct clockdomain ducati_44xx_clkdm = {
- .name = "ducati_clkdm",
- .pwrdm = { .name = "core_pwrdm" },
- .prcm_partition = OMAP4430_CM2_PARTITION,
- .cm_inst = OMAP4430_CM2_CORE_INST,
- .clkdm_offs = OMAP4430_CM2_CORE_DUCATI_CDOFFS,
.dep_bit = OMAP4430_DUCATI_STATDEP_SHIFT,
- .wkdep_srcs = ducati_wkup_sleep_deps,
- .sleepdep_srcs = ducati_wkup_sleep_deps,
.flags = CLKDM_CAN_HWSUP_SWSUP,
};
static struct clockdomain mpu_44xx_clkdm = {
- .name = "mpuss_clkdm",
- .pwrdm = { .name = "mpu_pwrdm" },
- .prcm_partition = OMAP4430_CM1_PARTITION,
- .cm_inst = OMAP4430_CM1_MPU_INST,
- .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS,
- .wkdep_srcs = mpu_wkup_sleep_deps,
- .sleepdep_srcs = mpu_wkup_sleep_deps,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
};
static struct clockdomain l3_2_44xx_clkdm = {
- .name = "l3_2_clkdm",
- .pwrdm = { .name = "core_pwrdm" },
- .prcm_partition = OMAP4430_CM2_PARTITION,
- .cm_inst = OMAP4430_CM2_CORE_INST,
- .clkdm_offs = OMAP4430_CM2_CORE_L3_2_CDOFFS,
.dep_bit = OMAP4430_L3_2_STATDEP_SHIFT,
.flags = CLKDM_CAN_HWSUP,
};
static struct clockdomain l3_1_44xx_clkdm = {
- .name = "l3_1_clkdm",
- .pwrdm = { .name = "core_pwrdm" },
- .prcm_partition = OMAP4430_CM2_PARTITION,
- .cm_inst = OMAP4430_CM2_CORE_INST,
- .clkdm_offs = OMAP4430_CM2_CORE_L3_1_CDOFFS,
.dep_bit = OMAP4430_L3_1_STATDEP_SHIFT,
.flags = CLKDM_CAN_HWSUP,
};
static struct clockdomain iss_44xx_clkdm = {
- .name = "iss_clkdm",
- .pwrdm = { .name = "cam_pwrdm" },
- .prcm_partition = OMAP4430_CM2_PARTITION,
- .cm_inst = OMAP4430_CM2_CAM_INST,
- .clkdm_offs = OMAP4430_CM2_CAM_CAM_CDOFFS,
- .wkdep_srcs = iss_wkup_sleep_deps,
- .sleepdep_srcs = iss_wkup_sleep_deps,
.flags = CLKDM_CAN_SWSUP,
};
static struct clockdomain l3_dss_44xx_clkdm = {
- .name = "l3_dss_clkdm",
- .pwrdm = { .name = "dss_pwrdm" },
- .prcm_partition = OMAP4430_CM2_PARTITION,
- .cm_inst = OMAP4430_CM2_DSS_INST,
- .clkdm_offs = OMAP4430_CM2_DSS_DSS_CDOFFS,
.dep_bit = OMAP4430_DSS_STATDEP_SHIFT,
- .wkdep_srcs = l3_dss_wkup_sleep_deps,
- .sleepdep_srcs = l3_dss_wkup_sleep_deps,
.flags = CLKDM_CAN_HWSUP_SWSUP,
};
static struct clockdomain l4_wkup_44xx_clkdm = {
- .name = "l4_wkup_clkdm",
- .pwrdm = { .name = "wkup_pwrdm" },
- .prcm_partition = OMAP4430_PRM_PARTITION,
- .cm_inst = OMAP4430_PRM_WKUP_CM_INST,
- .clkdm_offs = OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS,
.dep_bit = OMAP4430_L4WKUP_STATDEP_SHIFT,
.flags = CLKDM_CAN_HWSUP | CLKDM_ACTIVE_WITH_MPU,
};
static struct clockdomain emu_sys_44xx_clkdm = {
- .name = "emu_sys_clkdm",
- .pwrdm = { .name = "emu_pwrdm" },
- .prcm_partition = OMAP4430_PRM_PARTITION,
- .cm_inst = OMAP4430_PRM_EMU_CM_INST,
- .clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS,
.flags = (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_FORCE_WAKEUP |
CLKDM_MISSING_IDLE_REPORTING),
};
static struct clockdomain l3_dma_44xx_clkdm = {
- .name = "l3_dma_clkdm",
- .pwrdm = { .name = "core_pwrdm" },
- .prcm_partition = OMAP4430_CM2_PARTITION,
- .cm_inst = OMAP4430_CM2_CORE_INST,
- .clkdm_offs = OMAP4430_CM2_CORE_SDMA_CDOFFS,
- .wkdep_srcs = l3_dma_wkup_sleep_deps,
- .sleepdep_srcs = l3_dma_wkup_sleep_deps,
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
};
-/* As clockdomains are added or removed above, this list must also be changed */
-static struct clockdomain *clockdomains_omap44xx[] __initdata = {
- &l4_cefuse_44xx_clkdm,
- &l4_cfg_44xx_clkdm,
- &tesla_44xx_clkdm,
- &l3_gfx_44xx_clkdm,
- &ivahd_44xx_clkdm,
- &l4_secure_44xx_clkdm,
- &l4_per_44xx_clkdm,
- &abe_44xx_clkdm,
- &l3_instr_44xx_clkdm,
- &l3_init_44xx_clkdm,
- &d2d_44xx_clkdm,
- &mpu0_44xx_clkdm,
- &mpu1_44xx_clkdm,
- &l3_emif_44xx_clkdm,
- &l4_ao_44xx_clkdm,
- &ducati_44xx_clkdm,
- &mpu_44xx_clkdm,
- &l3_2_44xx_clkdm,
- &l3_1_44xx_clkdm,
- &iss_44xx_clkdm,
- &l3_dss_44xx_clkdm,
- &l4_wkup_44xx_clkdm,
- &emu_sys_44xx_clkdm,
- &l3_dma_44xx_clkdm,
- NULL
+static const struct of_device_id omap_clkdm_match_table[] __initconst = {
+ { .compatible = "ti,omap4-mpu-clkdm", .data = &mpu0_44xx_clkdm },
+ { .compatible = "ti,omap4-l3-1-clkdm", .data = &l3_1_44xx_clkdm },
+ { .compatible = "ti,omap4-l3-2-clkdm", .data = &l3_2_44xx_clkdm },
+ { .compatible = "ti,omap4-l4-cfg-clkdm", .data = &l4_cfg_44xx_clkdm },
+ { .compatible = "ti,omap4-l3-instr-clkdm",
+ .data = &l3_instr_44xx_clkdm },
+ { .compatible = "ti,omap4-l3-emif-clkdm", .data = &l3_emif_44xx_clkdm },
+ { .compatible = "ti,omap4-l3-dma-clkdm", .data = &l3_dma_44xx_clkdm },
+ { .compatible = "ti,omap4-ducati-clkdm", .data = &ducati_44xx_clkdm },
+ { .compatible = "ti,omap4-d2d-clkdm", .data = &d2d_44xx_clkdm },
+ { .compatible = "ti,omap4-l4-cefuse-clkdm",
+ .data = &l4_cefuse_44xx_clkdm },
+ { .compatible = "ti,omap4-tesla-clkdm", .data = &tesla_44xx_clkdm },
+ { .compatible = "ti,omap4-l3-gfx-clkdm", .data = &l3_gfx_44xx_clkdm },
+ { .compatible = "ti,omap4-ivahd-clkdm", .data = &ivahd_44xx_clkdm },
+ { .compatible = "ti,omap4-l4-secure-clkdm",
+ .data = &l4_secure_44xx_clkdm },
+ { .compatible = "ti,omap4-l4-per-clkdm", .data = &l4_per_44xx_clkdm },
+ { .compatible = "ti,omap4-abe-clkdm", .data = &abe_44xx_clkdm },
+ { .compatible = "ti,omap4-l3-init-clkdm", .data = &l3_init_44xx_clkdm },
+ { .compatible = "ti,omap4-l4-alwon-clkdm", .data = &l4_ao_44xx_clkdm },
+ { .compatible = "ti,omap4-mpuss-clkdm", .data = &mpu_44xx_clkdm },
+ { .compatible = "ti,omap4-iss-clkdm", .data = &iss_44xx_clkdm },
+ { .compatible = "ti,omap4-l3-dss-clkdm", .data = &l3_dss_44xx_clkdm },
+ { .compatible = "ti,omap4-l4-wkup-clkdm", .data = &l4_wkup_44xx_clkdm },
+ { .compatible = "ti,omap4-emu-sys-clkdm", .data = &emu_sys_44xx_clkdm },
+ { }
};
-
void __init omap44xx_clockdomains_init(void)
{
clkdm_register_platform_funcs(&omap4_clkdm_operations);
- clkdm_register_clkdms(clockdomains_omap44xx);
+ of_omap_clockdomain_init(omap_clkdm_match_table);
clkdm_complete_init();
}
diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c
index 704664c..6f8fda7 100644
--- a/arch/arm/mach-omap2/powerdomains44xx_data.c
+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c
@@ -21,6 +21,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/of.h>
#include "powerdomain.h"
@@ -32,10 +33,7 @@
/* core_44xx_pwrdm: CORE power domain */
static struct powerdomain core_44xx_pwrdm = {
- .name = "core_pwrdm",
.voltdm = { .name = "core" },
- .prcm_offs = OMAP4430_PRM_CORE_INST,
- .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.banks = 5,
@@ -46,7 +44,7 @@ static struct powerdomain core_44xx_pwrdm = {
[3] = PWRSTS_OFF_RET, /* ducati_l2ram */
[4] = PWRSTS_OFF_RET, /* ducati_unicache */
},
- .pwrsts_mem_on = {
+ .pwrsts_mem_on = {
[0] = PWRSTS_ON, /* core_nret_bank */
[1] = PWRSTS_ON, /* core_ocmram */
[2] = PWRSTS_ON, /* core_other_bank */
@@ -58,10 +56,7 @@ static struct powerdomain core_44xx_pwrdm = {
/* gfx_44xx_pwrdm: 3D accelerator power domain */
static struct powerdomain gfx_44xx_pwrdm = {
- .name = "gfx_pwrdm",
.voltdm = { .name = "core" },
- .prcm_offs = OMAP4430_PRM_GFX_INST,
- .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_ON,
.banks = 1,
.pwrsts_mem_ret = {
@@ -75,10 +70,7 @@ static struct powerdomain gfx_44xx_pwrdm = {
/* abe_44xx_pwrdm: Audio back end power domain */
static struct powerdomain abe_44xx_pwrdm = {
- .name = "abe_pwrdm",
.voltdm = { .name = "iva" },
- .prcm_offs = OMAP4430_PRM_ABE_INST,
- .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF,
.banks = 2,
@@ -95,10 +87,7 @@ static struct powerdomain abe_44xx_pwrdm = {
/* dss_44xx_pwrdm: Display subsystem power domain */
static struct powerdomain dss_44xx_pwrdm = {
- .name = "dss_pwrdm",
.voltdm = { .name = "core" },
- .prcm_offs = OMAP4430_PRM_DSS_INST,
- .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF,
.banks = 1,
@@ -113,10 +102,7 @@ static struct powerdomain dss_44xx_pwrdm = {
/* tesla_44xx_pwrdm: Tesla processor power domain */
static struct powerdomain tesla_44xx_pwrdm = {
- .name = "tesla_pwrdm",
.voltdm = { .name = "iva" },
- .prcm_offs = OMAP4430_PRM_TESLA_INST,
- .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.banks = 3,
@@ -135,10 +121,7 @@ static struct powerdomain tesla_44xx_pwrdm = {
/* wkup_44xx_pwrdm: Wake-up power domain */
static struct powerdomain wkup_44xx_pwrdm = {
- .name = "wkup_pwrdm",
.voltdm = { .name = "wakeup" },
- .prcm_offs = OMAP4430_PRM_WKUP_INST,
- .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_ON,
.banks = 1,
.pwrsts_mem_ret = {
@@ -149,46 +132,22 @@ static struct powerdomain wkup_44xx_pwrdm = {
},
};
-/* cpu0_44xx_pwrdm: MPU0 processor and Neon coprocessor power domain */
-static struct powerdomain cpu0_44xx_pwrdm = {
- .name = "cpu0_pwrdm",
- .voltdm = { .name = "mpu" },
- .prcm_offs = OMAP4430_PRCM_MPU_CPU0_INST,
- .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
- .pwrsts = PWRSTS_OFF_RET_ON,
- .pwrsts_logic_ret = PWRSTS_OFF_RET,
- .banks = 1,
- .pwrsts_mem_ret = {
- [0] = PWRSTS_OFF_RET, /* cpu0_l1 */
- },
- .pwrsts_mem_on = {
- [0] = PWRSTS_ON, /* cpu0_l1 */
- },
-};
-
-/* cpu1_44xx_pwrdm: MPU1 processor and Neon coprocessor power domain */
-static struct powerdomain cpu1_44xx_pwrdm = {
- .name = "cpu1_pwrdm",
- .voltdm = { .name = "mpu" },
- .prcm_offs = OMAP4430_PRCM_MPU_CPU1_INST,
- .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
- .pwrsts = PWRSTS_OFF_RET_ON,
- .pwrsts_logic_ret = PWRSTS_OFF_RET,
- .banks = 1,
- .pwrsts_mem_ret = {
- [0] = PWRSTS_OFF_RET, /* cpu1_l1 */
+static struct powerdomain cpu_44xx_pwrdm = {
+ .voltdm = { .name = "mpu" },
+ .pwrsts = PWRSTS_OFF_RET_ON,
+ .pwrsts_logic_ret = PWRSTS_OFF_RET,
+ .banks = 1,
+ .pwrsts_mem_ret = {
+ [0] = PWRSTS_OFF_RET, /* cpuX_l1 */
},
- .pwrsts_mem_on = {
- [0] = PWRSTS_ON, /* cpu1_l1 */
+ .pwrsts_mem_on = {
+ [0] = PWRSTS_ON, /* cpuX_l1 */
},
};
/* emu_44xx_pwrdm: Emulation power domain */
static struct powerdomain emu_44xx_pwrdm = {
- .name = "emu_pwrdm",
.voltdm = { .name = "wakeup" },
- .prcm_offs = OMAP4430_PRM_EMU_INST,
- .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_ON,
.banks = 1,
.pwrsts_mem_ret = {
@@ -201,10 +160,7 @@ static struct powerdomain emu_44xx_pwrdm = {
/* mpu_44xx_pwrdm: Modena processor and the Neon coprocessor power domain */
static struct powerdomain mpu_44xx_pwrdm = {
- .name = "mpu_pwrdm",
.voltdm = { .name = "mpu" },
- .prcm_offs = OMAP4430_PRM_MPU_INST,
- .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.banks = 3,
@@ -222,10 +178,7 @@ static struct powerdomain mpu_44xx_pwrdm = {
/* ivahd_44xx_pwrdm: IVA-HD power domain */
static struct powerdomain ivahd_44xx_pwrdm = {
- .name = "ivahd_pwrdm",
.voltdm = { .name = "iva" },
- .prcm_offs = OMAP4430_PRM_IVAHD_INST,
- .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF,
.banks = 4,
@@ -246,10 +199,7 @@ static struct powerdomain ivahd_44xx_pwrdm = {
/* cam_44xx_pwrdm: Camera subsystem power domain */
static struct powerdomain cam_44xx_pwrdm = {
- .name = "cam_pwrdm",
.voltdm = { .name = "core" },
- .prcm_offs = OMAP4430_PRM_CAM_INST,
- .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_ON,
.banks = 1,
.pwrsts_mem_ret = {
@@ -263,10 +213,7 @@ static struct powerdomain cam_44xx_pwrdm = {
/* l3init_44xx_pwrdm: L3 initators pheripherals power domain */
static struct powerdomain l3init_44xx_pwrdm = {
- .name = "l3init_pwrdm",
.voltdm = { .name = "core" },
- .prcm_offs = OMAP4430_PRM_L3INIT_INST,
- .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.banks = 1,
@@ -281,10 +228,7 @@ static struct powerdomain l3init_44xx_pwrdm = {
/* l4per_44xx_pwrdm: Target peripherals power domain */
static struct powerdomain l4per_44xx_pwrdm = {
- .name = "l4per_pwrdm",
.voltdm = { .name = "core" },
- .prcm_offs = OMAP4430_PRM_L4PER_INST,
- .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.banks = 2,
@@ -304,19 +248,13 @@ static struct powerdomain l4per_44xx_pwrdm = {
* domain
*/
static struct powerdomain always_on_core_44xx_pwrdm = {
- .name = "always_on_core_pwrdm",
.voltdm = { .name = "core" },
- .prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST,
- .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_ON,
};
/* cefuse_44xx_pwrdm: Customer efuse controller power domain */
static struct powerdomain cefuse_44xx_pwrdm = {
- .name = "cefuse_pwrdm",
.voltdm = { .name = "core" },
- .prcm_offs = OMAP4430_PRM_CEFUSE_INST,
- .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_ON,
.flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
};
@@ -328,31 +266,29 @@ static struct powerdomain cefuse_44xx_pwrdm = {
* always_on_mpu
* stdefuse
*/
-
-/* As powerdomains are added or removed above, this list must also be changed */
-static struct powerdomain *powerdomains_omap44xx[] __initdata = {
- &core_44xx_pwrdm,
- &gfx_44xx_pwrdm,
- &abe_44xx_pwrdm,
- &dss_44xx_pwrdm,
- &tesla_44xx_pwrdm,
- &wkup_44xx_pwrdm,
- &cpu0_44xx_pwrdm,
- &cpu1_44xx_pwrdm,
- &emu_44xx_pwrdm,
- &mpu_44xx_pwrdm,
- &ivahd_44xx_pwrdm,
- &cam_44xx_pwrdm,
- &l3init_44xx_pwrdm,
- &l4per_44xx_pwrdm,
- &always_on_core_44xx_pwrdm,
- &cefuse_44xx_pwrdm,
- NULL
+static const struct of_device_id omap_pwrdm_match_table[] __initconst = {
+ { .compatible = "ti,omap4-cpu-pwrdm", .data = &cpu_44xx_pwrdm },
+ { .compatible = "ti,omap4-core-pwrdm", .data = &core_44xx_pwrdm },
+ { .compatible = "ti,omap4-gfx-pwrdm", .data = &gfx_44xx_pwrdm },
+ { .compatible = "ti,omap4-abe-pwrdm", .data = &abe_44xx_pwrdm },
+ { .compatible = "ti,omap4-dss-pwrdm", .data = &dss_44xx_pwrdm },
+ { .compatible = "ti,omap4-tesla-pwrdm", .data = &tesla_44xx_pwrdm },
+ { .compatible = "ti,omap4-wkup-pwrdm", .data = &wkup_44xx_pwrdm },
+ { .compatible = "ti,omap4-emu-pwrdm", .data = &emu_44xx_pwrdm },
+ { .compatible = "ti,omap4-mpu-pwrdm", .data = &mpu_44xx_pwrdm },
+ { .compatible = "ti,omap4-ivahd-pwrdm", .data = &ivahd_44xx_pwrdm },
+ { .compatible = "ti,omap4-cam-pwrdm", .data = &cam_44xx_pwrdm },
+ { .compatible = "ti,omap4-l3init-pwrdm", .data = &l3init_44xx_pwrdm },
+ { .compatible = "ti,omap4-l4per-pwrdm", .data = &l4per_44xx_pwrdm },
+ { .compatible = "ti,omap4-alwon-core-pwrdm",
+ .data = &always_on_core_44xx_pwrdm },
+ { .compatible = "ti,omap4-cefuse-pwrdm", .data = &cefuse_44xx_pwrdm },
+ { },
};
void __init omap44xx_powerdomains_init(void)
{
pwrdm_register_platform_funcs(&omap4_pwrdm_operations);
- pwrdm_register_pwrdms(powerdomains_omap44xx);
+ of_omap_powerdomain_init(omap_pwrdm_match_table);
pwrdm_complete_init();
}
--
1.7.9.5
--
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