Hi Roger, On 14/11/14 20:09, Marc Kleine-Budde wrote: > From: Roger Quadros <rogerq@xxxxxx> > > Some TI SoCs like DRA7 have a RAMINIT register specification > different from the other AMxx SoCs and as expected by the > existing driver. > > To add more insanity, this register is shared with other > IPs like DSS, PCIe and PWM. > > Provides a more generic mechanism to specify the RAMINIT > register location and START/DONE bit position and use the > syscon/regmap framework to access the register. This patch updates the syscon regmap using regmap_read + regmap_write. That's not a safe way to update the bits, as some other driver may touch the register between the read and write. The change has to be made using regmap_update_bits. We don't have other drivers using the register at the moment, but I presume we will sooner or later. Tomi
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