On Mon, Sep 29, 2014 at 08:06:47PM +0200, Sebastian Andrzej Siewior wrote:
> Cc: devicetree@xxxxxxxxxxxxxxx
> Reviewed-by: Tony Lindgren <tony@xxxxxxxxxxx>
> Tested-by: Tony Lindgren <tony@xxxxxxxxxxx>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@xxxxxxxxxxxxx>
> ---
> arch/arm/boot/dts/dra7.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> index d678152db4cb..f273e3811f75 100644
> --- a/arch/arm/boot/dts/dra7.dtsi
> +++ b/arch/arm/boot/dts/dra7.dtsi
> @@ -332,6 +332,8 @@
> ti,hwmods = "uart1";
> clock-frequency = <48000000>;
> status = "disabled";
> + dmas = <&sdma 49>, <&sdma 50>;
> + dma-names = "tx", "rx";
> };
>
> uart2: serial@4806c000 {
> @@ -341,6 +343,8 @@
> ti,hwmods = "uart2";
> clock-frequency = <48000000>;
> status = "disabled";
> + dmas = <&sdma 51>, <&sdma 52>;
> + dma-names = "tx", "rx";
> };
>
> uart3: serial@48020000 {
> @@ -350,6 +354,8 @@
> ti,hwmods = "uart3";
> clock-frequency = <48000000>;
> status = "disabled";
> + dmas = <&sdma 53>, <&sdma 54>;
> + dma-names = "tx", "rx";
> };
>
> uart4: serial@4806e000 {
> @@ -359,6 +365,8 @@
> ti,hwmods = "uart4";
> clock-frequency = <48000000>;
> status = "disabled";
> + dmas = <&sdma 55>, <&sdma 56>;
> + dma-names = "tx", "rx";
> };
>
> uart5: serial@48066000 {
> @@ -368,6 +376,8 @@
> ti,hwmods = "uart5";
> clock-frequency = <48000000>;
> status = "disabled";
> + dmas = <&sdma 63>, <&sdma 64>;
> + dma-names = "tx", "rx";
> };
>
> uart6: serial@48068000 {
> @@ -377,6 +387,8 @@
> ti,hwmods = "uart6";
> clock-frequency = <48000000>;
> status = "disabled";
> + dmas = <&sdma 79>, <&sdma 80>;
> + dma-names = "tx", "rx";
> };
>
> uart7: serial@48420000 {
According to the manual the DMA channels for UART7 to 10 are:
uart7: 144 145
uart8: 146 147
uart9: 148 149
uart10: 150 151
Might as well add those too. We have uart 7 and 8 in use on our board
so I am about to go test it.
--
Len Sorensen
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