On Tue, Apr 22, 2014 at 01:31:46PM -0500, Joel Fernandes wrote: > On my DRA7 system, when the kernel is built in THUMB mode, the secondary CPU > (Cortex A15) fails to come up causing SMP boot on second CPU to timeout. This > seems to be because the CPU is in ARM mode once the ROM hands over control to > the kernel. Switch to THUMB mode if required once the kernel is control of > secondary CPU. On OMAP4 on the other hand, it appears to be in THUMB mode on > entry so this is not required and SMP boot works as is. > > Cc: Santosh Shilimkar <santosh.shilimkar@xxxxxx> > Cc: Russell King <linux@xxxxxxxxxxxxxxxx> > Cc: Nishanth Menon <nm@xxxxxx> > Cc: Tony Lindgren <tony@xxxxxxxxxxx> > Signed-off-by: Joel Fernandes <joelf@xxxxxx> > --- > arch/arm/mach-omap2/omap-headsmp.S | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S > index 75e9295..1809dce 100644 > --- a/arch/arm/mach-omap2/omap-headsmp.S > +++ b/arch/arm/mach-omap2/omap-headsmp.S > @@ -1,7 +1,7 @@ > /* > * Secondary CPU startup routine source file. > * > - * Copyright (C) 2009 Texas Instruments, Inc. > + * Copyright (C) 2014 Texas Instruments, Inc. > * > * Author: > * Santosh Shilimkar <santosh.shilimkar@xxxxxx> > @@ -28,9 +28,13 @@ > * code. This routine also provides a holding flag into which > * secondary core is held until we're ready for it to initialise. > * The primary core will update this flag using a hardware > -+ * register AuxCoreBoot0. > + * register AuxCoreBoot0. > */ > ENTRY(omap5_secondary_startup) Are you sure this problem is not caused by the missing ENDPROC() for omap5_secondary_startup? You have END() instead (which may have been accidental). Without ENDPROC(), the symbol is not marked as a function and so the Thumb bit won't be set when taking a pointer -- so the kernel is actually telling the firmware to enter in ARM state. Try changing END() to ENDPROC() without this patch, and see if it makes a difference. If it still doesn't work, then the firmware either doesn't support entering in ARM, or is buggy. Cheers ---Dave > +.arm > +THUMB( adr r9, BSYM(wait) ) @ CPU may be entered in ARM mode. > +THUMB( bx r9 ) @ If this is a Thumb-2 kernel, > +THUMB( .thumb ) @ switch to Thumb now. > wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 > ldr r0, [r2] > mov r0, r0, lsr #5 > -- > 1.7.9.5 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@xxxxxxxxxxxxxxxxxxx > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
