> owner@xxxxxxxxxxxxxxx] On Behalf Of Kevin Hilman > Sent: Friday, January 30, 2009 11:12 AM > Another possibility is that the the memory timings for the custom > board are not set correctly. Yes this is correct also. For example if the XSR field is wrong in SDRC registers (exit from self refresh timing). > Richard, Do you have pointers to CDP/zoom code that has a workaround > for the 3430 > es3 errata as well as the 'ctrl sequence issue' you > mentioned? If you look for ES3 in code you'll find pointers. Latest version is here (plus a bit of C code also not in link): http://git.omapzoom.org/?p=omapkernel.git;a=blob;f=arch/arm/mach-omap2/sleep_34xx.S;h=1fcd9df16f5cbd5650c8c1c1775024e0ffd3bf7b;hb=b60074dc4c793cfc79273b178acc1eef364712f9 You'll find a bit better broken out version here: http://git.omapzoom.com/?p=omapkernel.git;a=commitdiff;h=9543e96f5fdb32dbcd83437ac67e48edabdf9373 ROM code changed a bit and it resulted in self-refresh command not being sent. Prior to sleep you need to set refresh on timeout and at wake up you need to hop into sram to reprogram ddr controller then hop back to complete context restore. Regards, Richard W. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html