On Mon, 2013-12-02 at 17:05 +0000, Gupta, Pekon wrote: > (2) Also selection of ecc-scheme mainly depends on NAND device parameter > (like density, page-size, oobsize) which remain constant for a device > (all NAND partitions). Thus all partitions should use *same* ecc-scheme > preferable highest possible available with NAND device & kernel. It was pointed out earlier in the thread that there are chips for which it is not constant throughout the device (i.e. the boot block is special, presumably implemented differently in hardware). > (3) Kernel uses same driver instance to handle all MTD partitions, so if one > partition uses HAM1 while other uses BCH8, and both are simultaneously > mounted, then it would be difficult for driver to switch ecc-schemes while > doing interleaved Read/Write between the partitions. > (though it can be added in framework, but then it's too much over-head). Don't think of it as switching back and forth for every access, but rather having dynamic dispatch to the proper code for any given access. I'm not sure that partitions are the right place to implement this, as they're a higher level abstraction. If the NAND chip says that 1-bit correction is good enough for certain blocks but not others, then that's chip-level information that the driver ought to know about independently of partitioning. OTOH, that doesn't provide the ability to manage compatibility with entities that use stronger correction than is needed (or different ways of achieving the same level of correction), but it could be a simpler way to solve the basic problem of boot blocks being special. -Scott -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
