Re: [patch 2.6.27-rc8-omap 0/7] resend of pending TWL patches

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On Sunday 12 October 2008, Pandita, Vikram wrote:
> >> >         /* Wait for TLL to be Active */
> >> >         while ((cm_read_mod_reg(CORE_MOD, OMAP2430_CM_IDLEST3) &
> >> >                 (1 << OMAP3430ES2_ST_USBTLL_SHIFT)));
> >>
> >> Fishy ... TLL == TransceiverLess Link, which is used with
> >> on-board links that don't need to be morphed to use signals
> >> that go over cables as defined in the USB spec.  I would
> >> think you'd want ULPI.
> >
> >TLL block does get used for some cases for non-tll (phy) mode use.  
> 
> In particular, clocking mode used for EHCI on omap34xx is input clocking mode.
> This means OMAP feeds the 60Mhz clock and TLL module is used to generate the 60Mhz clock.
> So irrespective of TLL or ULPI-PHY mode, TLL block has to be kept up.

OK ... I suggest a comment in the code explaining that,
so it's clear what's going on.

Along with whatever fix is needed to allow booting with
EHCI enabled again.  Something seems to be preventing
TLL from coming up now...


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