jouni.hogander@xxxxxxxxx (Högander Jouni) writes:
> "ext chandra shekhar" <x0044955@xxxxxx> writes:
>
>> agreed..but i guess it will not compile for 2430 and prev. platforms.
>> omap3_i2c_save_context and restore definition is under macro
>> while call is not. let me know if i am missing something.
>>
>> also is SYSC register restore needed??
>
> Here is the second version. Does it look any better to you?
>
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index 3778735..0a11621 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -147,6 +147,12 @@ struct omap_i2c_dev {
> unsigned b_hw:1; /* bad h/w fixes */
> unsigned idle:1;
> u16 iestate; /* Saved interrupt register */
> +#ifdef CONFIG_ARCH_OMAP34XX
> + u16 pscstate;
> + u16 scllstate;
> + u16 sclhstate;
> + u16 bufstate;
> +#endif
> };
>
> static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
> @@ -209,16 +215,21 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev)
> if (dev->iclk != NULL)
> clk_enable(dev->iclk);
> clk_enable(dev->fclk);
> +
> +#ifdef CONFIG_ARCH_OMAP34XX
> + omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->pscstate);
> + omap_i2c_write_reg(dev, OMAP_I2C_SCLL_REG, dev->scllstate);
> + omap_i2c_write_reg(dev, OMAP_I2C_SCLH_REG, dev->sclhstate);
> + omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, dev->bufstate);
> +#endif
The above should also be inside an if cpu_is_omap34xx() block so
it works correctly on multi-omap kernels.
Kevin
> dev->idle = 0;
> - if (dev->iestate)
> - omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate);
> + omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate);
> }
>
> static void omap_i2c_idle(struct omap_i2c_dev *dev)
> {
> u16 iv;
>
> - dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
> omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);
> if (dev->rev1)
> iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG);
> @@ -238,7 +249,7 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
>
> static int omap_i2c_init(struct omap_i2c_dev *dev)
> {
> - u16 psc = 0, scll = 0, sclh = 0;
> + u16 psc = 0, scll = 0, sclh = 0, buf = 0;
> u16 fsscll = 0, fssclh = 0, hsscll = 0, hssclh = 0;
> unsigned long fclk_rate = 12000000;
> unsigned long timeout;
> @@ -327,23 +338,30 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
> omap_i2c_write_reg(dev, OMAP_I2C_SCLL_REG, scll);
> omap_i2c_write_reg(dev, OMAP_I2C_SCLH_REG, sclh);
>
> - if (dev->fifo_size)
> - /* Note: setup required fifo size - 1 */
> - omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG,
> - (dev->fifo_size - 1) << 8 | /* RTRSH */
> - OMAP_I2C_BUF_RXFIF_CLR |
> - (dev->fifo_size - 1) | /* XTRSH */
> - OMAP_I2C_BUF_TXFIF_CLR);
> + if (dev->fifo_size) {
> + /* Note: setup required fifo size - 1. RTRSH and XTRSH */
> + buf = (dev->fifo_size - 1) << 8 | OMAP_I2C_BUF_RXFIF_CLR |
> + (dev->fifo_size - 1) | OMAP_I2C_BUF_TXFIF_CLR;
> + omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, buf);
> + }
>
> /* Take the I2C module out of reset: */
> omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN);
>
> /* Enable interrupts */
> - omap_i2c_write_reg(dev, OMAP_I2C_IE_REG,
> - (OMAP_I2C_IE_XRDY | OMAP_I2C_IE_RRDY |
> + dev->iestate = (OMAP_I2C_IE_XRDY | OMAP_I2C_IE_RRDY |
> OMAP_I2C_IE_ARDY | OMAP_I2C_IE_NACK |
> OMAP_I2C_IE_AL) | ((dev->fifo_size) ?
> - (OMAP_I2C_IE_RDR | OMAP_I2C_IE_XDR) : 0));
> + (OMAP_I2C_IE_RDR | OMAP_I2C_IE_XDR) : 0);
> + omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate);
> +
> +#ifdef CONFIG_ARCH_OMAP34XX
> + dev->pscstate = psc;
> + dev->scllstate = scll;
> + dev->sclhstate = sclh;
> + dev->bufstate = buf;
> +#endif
> +
> return 0;
> }
>
> @@ -496,8 +514,6 @@ omap_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
>
> omap_i2c_unidle(dev);
>
> - omap_i2c_init(dev);
> -
> if ((r = omap_i2c_wait_for_bb(dev)) < 0)
> goto out;
>
> --
> Jouni Högander
>
> --
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