Hi,
Below is the updated patch after fixing Tony's comment.
From: Teerth Reddy <teerth@xxxxxx>
This patch adds NAND support on 3430sdp board
[VS: updated for SZ_.. macros]
Signed-off-by: Teerth Reddy <teerth@xxxxxx>
Signed-off-by: Vimal Singh <vimal.singh@xxxxxx>
---
arch/arm/mach-omap2/board-3430sdp-flash.c | 88 ++++++++++++++++++++++++++++--
arch/arm/plat-omap/include/mach/gpmc.h | 10 +++
2 files changed, 93 insertions(+), 5 deletions(-)
Index: linux-omap-2.6_27_08_2008/arch/arm/mach-omap2/board-3430sdp-flash.c
===================================================================
---
linux-omap-2.6_27_08_2008.orig/arch/arm/mach-omap2/board-3430sdp-flash.c 2008-08-27
11:40:26.000000000 +0530
+++
linux-omap-2.6_27_08_2008/arch/arm/mach-omap2/board-3430sdp-flash.c 2008-09-11
11:10:44.000000000 +0530
@@ -24,6 +24,7 @@
#include <mach/onenand.h>
#include <mach/board.h>
#include <mach/gpmc.h>
+#include <mach/nand.h>
static struct mtd_partition sdp_nor_partitions[] = {
/* bootloader (U-Boot, etc) in first sector */
@@ -137,6 +138,61 @@
/* Onenand setup does nothing at present */
return 0;
}
+
+static struct mtd_partition sdp_nand_partitions[] = {
+ /* All the partition sizes are listed in terms of NAND block size */
+ {
+ .name = "X-Loader-NAND",
+ .offset = 0,
+ .size = SZ_512K,
+ .mask_flags = MTD_WRITEABLE, /* force read-only */
+ },
+ {
+ .name = "U-Boot-NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
+ .size = SZ_512K,
+ .mask_flags = MTD_WRITEABLE, /* force read-only */
+ },
+ {
+ .name = "Boot Env-NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x100000 */
+ .size = SZ_256K,
+ },
+ {
+ .name = "Kernel-NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x140000 */
+ .size = SZ_4M,
+ },
+ {
+ .name = "File System - NAND",
+ .size = MTDPART_SIZ_FULL,
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x540000 */
+ },
+};
+
+static struct omap_nand_platform_data sdp_nand_data = {
+ .parts = sdp_nand_partitions,
+ .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
+ .nand_setup = NULL,
+ .dma_channel = -1, /* disable DMA in OMAP NAND driver */
+ .dev_ready = NULL,
+};
+
+static struct resource sdp_nand_resource = {
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device sdp_nand_device = {
+ .name = "omap2-nand",
+ .id = 0,
+ .dev = {
+ .platform_data = &sdp_nand_data,
+ },
+ .num_resources = 1,
+ .resource = &sdp_nand_resource,
+};
+
+
/**
* sdp3430_flash_init - Identify devices connected to GPMC and register.
*
@@ -145,7 +201,11 @@
void __init sdp3430_flash_init(void)
{
u8 cs = 0;
+ u8 nandcs = GPMC_CS_NUM + 1;
u8 onenandcs = GPMC_CS_NUM + 1;
+ unsigned long gpmc_base_add;
+
+ gpmc_base_add = OMAP34XX_GPMC_VIRT;
/* Configure start address and size of NOR device */
if (is_sil_rev_greater_than(OMAP3430_REV_ES1_0)) {
@@ -163,25 +223,43 @@
while (cs < GPMC_CS_NUM) {
u32 ret = 0;
- ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
+ ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
/*
- * xloader/Uboot would have programmed the oneNAND
+ * xloader/Uboot would have programmed the NAND/oneNAND
* base address for us This is a ugly hack. The proper
* way of doing this is to pass the setup of u-boot up
* to kernel using kernel params - something on the
* lines of machineID. Check if oneNAND is configured
*/
- if ((ret & 0x3F) == (ONENAND_MAP >> 24))
+ if ((ret & 0xC00) == 0x800) {
+ /* Found it!! */
+ if (nandcs > GPMC_CS_NUM)
+ nandcs = cs;
+ } else {
+ ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
+ if ((ret & 0x3F) == (ONENAND_MAP >> 24))
onenandcs = cs;
+ }
cs++;
}
- if (onenandcs > GPMC_CS_NUM) {
- printk(KERN_INFO "OneNAND: Unable to find configuration "
+ if ((nandcs > GPMC_CS_NUM) && (onenandcs > GPMC_CS_NUM)) {
+ printk(KERN_INFO "NAND/OneNAND: Unable to find configuration "
" in GPMC\n ");
return;
}
+ if (nandcs < GPMC_CS_NUM) {
+ sdp_nand_data.cs = nandcs;
+ sdp_nand_data.gpmc_cs_baseaddr = (void *)(gpmc_base_add +
+ GPMC_CS0_BASE + nandcs*GPMC_CS_SIZE);
+ sdp_nand_data.gpmc_baseaddr = (void *) (gpmc_base_add);
+
+ if (platform_device_register(&sdp_nand_device) < 0) {
+ printk(KERN_ERR "Unable to register NAND device\n");
+ }
+ }
+
if (onenandcs < GPMC_CS_NUM) {
sdp_onenand_data.cs = onenandcs;
if (platform_device_register(&sdp_onenand_device) < 0)
Index: linux-omap-2.6_27_08_2008/arch/arm/plat-omap/include/mach/gpmc.h
===================================================================
---
linux-omap-2.6_27_08_2008.orig/arch/arm/plat-omap/include/mach/gpmc.h 2008-08-27
11:40:27.000000000 +0530
+++ linux-omap-2.6_27_08_2008/arch/arm/plat-omap/include/mach/gpmc.h 2008-08-27
15:21:22.000000000 +0530
@@ -25,8 +25,18 @@
#define GPMC_CS_NAND_ADDRESS 0x20
#define GPMC_CS_NAND_DATA 0x24
+/*
+ * The following gpmc registers are being used by
+ * nand driver and hence is defined here.
+ * TBD: Move them to gpmc.c by providing appropriate
+ * methods to read and write into these registers
+ */
+#define GPMC_IRQSTATUS 0x18
#define GPMC_CONFIG 0x50
#define GPMC_STATUS 0x54
+#define GPMC_CS0_BASE 0x60
+#define GPMC_CS_SIZE 0x30
+
#define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31)
#define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30)
--
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