Re: [PATCH 00/11] OMAP3 CPUidle patches

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"ext Woodruff, Richard" <r-woodruff2@xxxxxx> writes:

>> I am still trying to find my way thru the codebase in GIT; but here is
>> what I can suggest based on similar problem diagnosed (still under
>> test) on the OMAP3EVM:
>>
>> 1) Save/restore the GPIO_IRQENABLE1, GPIO_IRQENABLE2
>> 2) Save/restore the GPIO_IRQSTATUS1, GPIO_IRQSTATUS2
>
> For sure save/restore of IRQENABLE is needed.  Our Labrador board
> which has Ethernet on per-gpio would stop to function after an OFF
> mode transition with out this save and restore (using CDP reference
> code).

I think this is not related to OFF mode, because OFF state is not
used on the boot. This problem seems to disappear when boot is
done and C6 state is started to be used. Currently it seems to me that
this problem exists if using states where mpu is in sleep state and
core is active (C2, C3). This is under investigation. Is there any
known restrictions in GPIO1 module wake-up capability when mpu is in
sleep and core active? Any other known restrictions?

>
> I don't think STATUS is necessary.  It’s a write 1 to clear register and should re-latch once there is data.
>
> As a side note I was noting that the SMC9211 etherchip actually may need a dvfs pre-post notifier.  During DVFS spurious interrupt events cause the interface to disable interrupts on its own on some tests.
>
> Regards,
> Richard W.
>

-- 
Jouni Högander

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