The OMAP34xx ES2+ TRMs do not document the CLKTRCTRL_D2D bit, even
though the clockdomain logic remains on the chip, and must be
programmed appropriately for the CORE clockdomain to go inactive.
Thanks to Rajendra Najak <rnayak@xxxxxx> and Richard Woodruff
<r-woodruff2@xxxxxx> of TI for providing more detail on this issue;
and to Jouni Högander <jouni.hogander@xxxxxxxxx> for proposing this
fix.
This patch obsoletes the D2D clockdomain workaround in pm34xx.c in
Jouni's recent patch set.
Signed-off-by: Paul Walmsley <paul@xxxxxxxxx>
---
arch/arm/mach-omap2/clockdomains.h | 9 ++++++++-
1 files changed, 8 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomains.h b/arch/arm/mach-omap2/clockdomains.h
index adbc170..b5d3244 100644
--- a/arch/arm/mach-omap2/clockdomains.h
+++ b/arch/arm/mach-omap2/clockdomains.h
@@ -168,12 +168,19 @@ static struct clockdomain sgx_clkdm = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
};
+/*
+ * The die-to-die clockdomain was documented in the 34xx ES1 TRM, but
+ * then that information was removed from the 34xx ES2+ TRM. It is
+ * unclear whether the core is still there, but the clockdomain logic
+ * is there, and must be programmed to an appropriate state if the
+ * CORE clockdomain is to become inactive.
+ */
static struct clockdomain d2d_clkdm = {
.name = "d2d_clkdm",
.pwrdm_name = "core_pwrdm",
.flags = CLKDM_CAN_HWSUP,
.clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK,
- .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
};
static struct clockdomain core_l3_34xx_clkdm = {
--
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