[PATCH 1/3] This patch adds prm/cm specific changes required for USBHOST on OMAP34xx

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This patch adds PRM/CM defines used by OMAP EHCI on OMAP34xx

Signed-off-by: Vikram Pandita <vikram.pandita@xxxxxx>
---
 arch/arm/mach-omap2/cm.h              |   22 ++++++++++++++++++++
 arch/arm/mach-omap2/cm_regbits_34xx.h |   37 +++++++++++++++++++++++++++++++++-
 arch/arm/mach-omap2/prm.h             |   19 +++++++++++++++++
 3 files changed, 77 insertions(+), 1 deletion(-)

Index: omap-submit/arch/arm/mach-omap2/cm.h
===================================================================
--- omap-submit.orig/arch/arm/mach-omap2/cm.h	2008-01-31 11:58:06.000000000 +0530
+++ omap-submit/arch/arm/mach-omap2/cm.h	2008-01-31 11:58:34.000000000 +0530
@@ -124,7 +124,29 @@
 #define OMAP3430ES2_CM_CLKSEL5				0x0050
 #define OMAP3430_CM_CLKSEL2_EMU				0x0050
 #define OMAP3430_CM_CLKSEL3_EMU				0x0054
+#define OMAP3430_CM_IDLEST3_CORE			0x0028
+#define OMAP3430_CM_AUTOIDLE3_CORE			0x0038
 
 
+#define CM_CLKEN2_PLL		OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKEN2)
+#define CM_IDLEST2_CKGEN	OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST2)
+#define CM_CLKSEL4_PLL		OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL4)
+#define CM_CLKSEL5_PLL		OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL5)
+
+/* USB-TLL */
+#define CM_FCLKEN3_CORE		OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3)
+#define CM_ICLKEN3_CORE		OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN3)
+#define CM_IDLEST3_CORE		OMAP_CM_REGADDR(CORE_MOD, OMAP3430_CM_IDLEST3_CORE)
+#define CM_AUTOIDLE3_CORE	OMAP_CM_REGADDR(CORE_MOD, OMAP3430_CM_AUTOIDLE3_CORE)
+
+/* USBHOST */
+#define CM_FCLKEN_USBHOST	OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN)
+#define CM_ICLKEN_USBHOST 	OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN)
+#define CM_IDLEST_USBHOST	OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_IDLEST)
+#define CM_AUTOIDLE_USBHOST	OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_AUTOIDLE)
+#define CM_SLEEPDEP_USBHOST	OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, OMAP3430_CM_SLEEPDEP)
+#define CM_CLKSTCTRL_USBHOST	OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_CLKSTCTRL)
+#define CM_CLKSTST_USBHOST	OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, OMAP3430_CM_CLKSTST)
+
 
 #endif
Index: omap-submit/arch/arm/mach-omap2/cm_regbits_34xx.h
===================================================================
--- omap-submit.orig/arch/arm/mach-omap2/cm_regbits_34xx.h	2008-01-31 11:58:06.000000000 +0530
+++ omap-submit/arch/arm/mach-omap2/cm_regbits_34xx.h	2008-01-31 11:58:23.000000000 +0530
@@ -198,6 +198,10 @@
 #define OMAP3430_ST_SHA11				(1 << 1)
 #define OMAP3430_ST_DES1				(1 << 0)
 
+/* CM_IDLEST3_CORE */
+#define OMAP3430_ST_USBTLL				(1 << 2)
+#define OMAP3430_ST_USBTLL_SHIFT			2
+
 /* CM_AUTOIDLE1_CORE */
 #define OMAP3430_AUTO_AES2				(1 << 28)
 #define OMAP3430_AUTO_AES2_SHIFT			28
@@ -266,6 +270,10 @@
 #define OMAP3430_AUTO_DES1				(1 << 0)
 #define OMAP3430_AUTO_DES1_SHIFT			0
 
+/* CM_AUTOIDLE3_CORE */
+#define OMAP3430_AUTO_USBTLL				(1 << 2)
+#define OMAP3430_AUTO_USBTLL_SHIFT			2
+
 /* CM_CLKSEL_CORE */
 #define OMAP3430_CLKSEL_SSI_SHIFT			8
 #define OMAP3430_CLKSEL_SSI_MASK			(0xf << 8)
@@ -384,9 +392,11 @@
 /* CM_CLKEN2_PLL */
 #define OMAP3430ES2_EN_PERIPH2_DPLL_LPMODE_SHIFT		10
 #define OMAP3430ES2_PERIPH2_DPLL_RAMPTIME_MASK		(0x3 << 8)
+#define OMAP3430ES2_PERIPH2_DPLL_FREQSEL_SHIFT		4
 #define OMAP3430ES2_PERIPH2_DPLL_FREQSEL_MASK		(0xf << 4)
 #define OMAP3430ES2_EN_PERIPH2_DPLL_DRIFTGUARD_SHIFT	3
-#define OMAP3430ES2_EN_PERIPH2_DPLL_MASK		        (0x7 << 0)
+#define OMAP3430ES2_EN_PERIPH2_DPLL_SHIFT		0
+#define OMAP3430ES2_EN_PERIPH2_DPLL_MASK		(0x7 << 0)
 
 /* CM_IDLEST_CKGEN */
 #define OMAP3430_ST_54M_CLK				(1 << 5)
@@ -396,6 +406,10 @@
 #define OMAP3430_ST_PERIPH_CLK				(1 << 1)
 #define OMAP3430_ST_CORE_CLK				(1 << 0)
 
+/* CM_IDLEST2_CKGEN */
+#define OMAP3430_ST_120M_CLK				(1 << 1)
+#define OMAP3430_ST_PERIPH2_CLK				(1 << 0)
+
 /* CM_AUTOIDLE_PLL */
 #define OMAP3430_AUTO_PERIPH_DPLL_SHIFT			3
 #define OMAP3430_AUTO_PERIPH_DPLL_MASK			(0x7 << 3)
@@ -424,10 +438,13 @@
 #define OMAP3430_DIV_96M_MASK				(0x1f << 0)
 
 /* CM_CLKSEL4_PLL */
+#define OMAP3430ES2_PERIPH2_DPLL_MULT_SHIFT		8
 #define OMAP3430ES2_PERIPH2_DPLL_MULT_MASK		(0x7ff << 8)
+#define OMAP3430ES2_PERIPH2_DPLL_DIV_SHIFT		0
 #define OMAP3430ES2_PERIPH2_DPLL_DIV_MASK		(0x7f << 0)
 
 /* CM_CLKSEL5_PLL */
+#define OMAP3430ES2_DIV_120M_SHIFT			0
 #define OMAP3430ES2_DIV_120M_MASK			(0x1f << 0)
 
 /* CM_CLKOUT_CTRL */
@@ -629,4 +646,22 @@
 #define OMAP3430ES2_EN_USBHOST_SHIFT			0
 #define OMAP3430ES2_EN_USBHOST_MASK			(1 << 0)
 
+/* CM_IDLEST_USBHOST */
+
+/* CM_AUTOIDLE_USBHOST */
+#define OMAP3430ES2_AUTO_USBHOST_SHIFT			0
+#define OMAP3430ES2_AUTO_USBHOST_MASK			(1<<0)
+
+/* CM_SLEEPDEP_USBHOST */
+#define OMAP3430ES2_EN_MPU_SHIFT			1
+#define OMAP3430ES2_EN_MPU_MASK				(1<<1)
+#define OMAP3430ES2_EN_IVA2_SHIFT			2
+#define OMAP3430ES2_EN_IVA2_MASK			(1<<2)
+
+/* CM_CLKSTCTRL_USBHOST */
+#define OMAP3430ES2_CLKTRCTRL_USBHOST_SHIFT		0
+#define OMAP3430ES2_CLKTRCTRL_USBHOST_MASK		(3<<0)
+
+
+
 #endif
Index: omap-submit/arch/arm/mach-omap2/prm.h
===================================================================
--- omap-submit.orig/arch/arm/mach-omap2/prm.h	2008-01-31 11:58:06.000000000 +0530
+++ omap-submit/arch/arm/mach-omap2/prm.h	2008-01-31 12:06:14.000000000 +0530
@@ -90,6 +90,25 @@
 #define OMAP3430_PRM_CLKSEL		OMAP_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0040)
 #define OMAP3430_PRM_CLKOUT_CTRL	OMAP_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0070)
 
+#define RM_RSTST_USBHOST\
+		OMAP_PRM_REGADDR(OMAP2_PRM_BASE, RM_RSTST)
+#define PM_WKEN_USBHOST\
+		OMAP_PRM_REGADDR(OMAP2_PRM_BASE, PM_WKEN)
+#define PM_MPUGRPSEL_USBHOST\
+		OMAP_PRM_REGADDR(OMAP2_PRM_BASE, OMAP3430_PM_MPUGRPSEL)
+#define PM_IVA2GRPSEL_USBHOST\
+		OMAP_PRM_REGADDR(OMAP2_PRM_BASE, OMAP3430_PM_IVAGRPSEL)
+#define PM_WKST_USBHOST\
+		OMAP_PRM_REGADDR(OMAP2_PRM_BASE, PM_WKST)
+#define PM_WKDEP_USBHOST\
+		OMAP_PRM_REGADDR(OMAP2_PRM_BASE, PM_WKDEP)
+#define PM_PWSTCTRL_USBHOST\
+		OMAP_PRM_REGADDR(OMAP2_PRM_BASE, PM_PWSTCTRL)
+#define PM_PWSTST_USBHOST\
+		OMAP_PRM_REGADDR(OMAP2_PRM_BASE, PM_PWSTST)
+#define PM_PREPWSTST_USBHOST\
+		OMAP_PRM_REGADDR(OMAP2_PRM_BASE, OMAP3430_PM_PREPWSTST)
+
 /* Power/reset management global register get/set */
 
 static void __attribute__((unused)) prm_write_reg(u32 val, void __iomem *addr)
-
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